CRD42L52 Cirrus Logic Inc, CRD42L52 Datasheet

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CRD42L52

Manufacturer Part Number
CRD42L52
Description
REFERENCE DESIGN FOR CS42L52
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of CRD42L52

Main Purpose
Audio, CODEC
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
CS42L52
Primary Attributes
2 Stereo Analog Inputs, Stereo Line and Headphone Outputs, S/PDIF Transmitter and Receiver
Secondary Attributes
Graphical User Interface
Product
Audio Modules
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Other names
598-1580
Reference Design Board (CRD42L52)
Features
Peripheral Driver Board (CDB42LDB1)
Features
Reference Design and Peripheral Driver Board for CS42L52
Right
Ultra-Small Layout
Stake Header for External System Connections
1/8” Stereo Input Allows up to 2 Vrms Signals
1/8” Stereo Headphone Output Jack
Built-in Switch Control for CS42L52 SPKR/HP
Pin
Stereo Full Bridge Speaker Output Terminal
Complies with FCC class B and CISPR 22
Standards for Radiated Emissions
Multiple Power Supply Options
S/PDIF I/O (CS8416 Receiver)
S/PDIF I/O (CS8406 Transmitter)
FlexGUI S/W Control - Windows
Left
http://www.cirrus.com
Speaker
+
+
-
-
Three AAA Battery Source
External Power Supply Header
Optical and RCA Input Jacks
Optical and RCA Output Jacks
Pre-Defined & User Configurable Scripts
J5
Control
Port
I²C
CRD42L52
CS42L52
SAI
Supply
Power
Headphone
Output
Input
Line
®
Compatible
S/PDIF
USB
Copyright © Cirrus Logic, Inc. 2008
Input
Micro Reset
Pushbutton
Microcontroller
(All Rights Reserved)
I²C Control Port
S/PDIF Rx
CS8416
Interface
Description
In addition to providing a reference for an ultra small lay-
out design, the purpose of the CRD42L52 is to allow a
quick and easy evaluation of the CS42L52 low power
stereo CODEC.
Two 1/8” stereo jacks on the CRD42L52 provide an in-
terface for analog line-level input and headphone-level
output connections to the CS42L52. Stereo differential
PWM speaker outputs from the CS42L52 can be moni-
tored on a pair of screw terminals on the CRD42L52.
The control port and serial audio interfaces are accessi-
ble via the I/O stake header used to attach the
CRD42L52 to the CDB42LDB1.
The CDB42LDB1 is a peripheral driver board that pro-
vides clock/data, control logic and power supply to the
CRD42L52. Digital data is transmitted and received via
S/PDIF optical and RCA connectors. The CRD42L52
can be programmed by using the Windows Compatible
FlexGUI software provided. Power is derived either
from three AAA batteries or from an external supply on
the CDB42LDB1 driver board and is routed to the
CRD42L52 via the I/O stake header.
ORDERING INFORMATION
CRD42L52
CDB42LDB1
MCLK
J3
12.288 MHz
I/O Header
CDB42LDB1
Serial Audio Interface
Placeholder
CRD
J4
CRD42L52
AAA Battery
Reference Design
S/PDIF Tx
Clip
CS8406
Driver Board
DS680RD1
External
Power
APRIL '08
S/PDIF
Output

Related parts for CRD42L52

CRD42L52 Summary of contents

Page 1

... J5 http://www.cirrus.com Description In addition to providing a reference for an ultra small lay- out design, the purpose of the CRD42L52 is to allow a quick and easy evaluation of the CS42L52 low power stereo CODEC. Two 1/8” stereo jacks on the CRD42L52 provide an in- terface for analog line-level input and headphone-level output connections to the CS42L52 ...

Page 2

... DSP Engine Tab ............................................................................................................................ 12 4.4 Analog and PWM Output Volume Tab ........................................................................................... 13 4.5 Register Maps Tab ......................................................................................................................... 14 5. PERFORMANCE PLOTS ..................................................................................................................... 15 6. SYSTEM CONNECTIONS & INTERFACE ........................................................................................... 18 CRD42L52 AND CDB42LDB1 BLOCK DIAGRAM .............................................................................. 19 7. CRD42L52 SCHEMATICS ................................................................................................................... 20 8. CDB42LDB1 SCHEMATICS ................................................................................................................ 21 9. CRD42L52 LAYOUT ............................................................................................................................ 23 10. CDB42LDB1 LAYOUT ....................................................................................................................... 24 11. REVISION HISTORY .......................................................................................................................... 27 ...

Page 3

... LIST OF FIGURES Figure 1.Quick-Start Guide ......................................................................................................................... 6 Figure 2.CRD42L52 and CDB42LDB1 Block Diagram for ADC and DAC Testing ..................................... 7 Figure 3.CRD42L52 and CDB42LDB1 Block Diagram for Digital Loopback Testing .................................. 8 Figure 4.CODEC Configuration Tab ......................................................................................................... 10 Figure 5.Analog Input Volume Tab ........................................................................................................... 11 Figure 6.DSP Engine Tab ......................................................................................................................... 12 Figure 7.Analog and PWM Output Volume Tab ........................................................................................ 13 Figure 8 ...

Page 4

... SYSTEM OVERVIEW The CRD42L52 provides a quick and general overview of the features in the CS42L52 CODEC in addition to pro- viding a reference for an ultra-small layout design. Line, headphone and PWM terminals are accommodated on the board for part evaluation and measurement pur- poses. The control port and serial audio interfaces are accessible via the I/O stake header used to attach the CRD42L52 to the CDB42LDB1 ...

Page 5

... Vrms. An AC-coupled passive filter and a voltage divider scale down the signal before sending it to the CS42L52 to prevent the signal from clipping. The CRD42L52 is routed to only allow analog inputs on input channel 1 of the CS42L52. Analog Input Chan- nels 2, 3 and 4 and Microphone Input Channels 1 and 2 are not connected. ...

Page 6

... Connect either S/PDIF optical or BNC cables for providing digital input. 1 Attach CRD42L52 to driver board. 6 Section 4 on page 9 for descriptions on control settings in the Cirrus FlexGUI 6 Set switch to Place 3 AAA batteries with correct polarity on clips BT1, desired setting. BT2 and BT3 behind the board or perform step 5 ii. ...

Page 7

... Line-level analog input can be provided to the CS42L52 via stereo jack J7 on the CRD42L52. The analog input path on the CRD42L52 scales the input down to a fifth of its actual value. Therefore, a 2.4 Vrms analog input into the CRD42L52 is required to provide full-scale input to the CS42L52. The ADC core uses the clocks provided to the CS42L52 by the CS8416 to perform the conversion and outputs data to the CS8406 S/PDIF transmitter on the CDB42LDB1 driver board via the I/O header, J3 ...

Page 8

... Table 3. S/PDIF In to Speaker Out Performance Plots CRD42L52 Line Input Headphone Output Figure 3. CRD42L52 and CDB42LDB1 Block Diagram for Digital Loopback Testing 3.4 Analog In to Analog Out - Digital Loopback In order to use the CS42L52 in digital loopback mode, one can configure the CS42L52 to operate in master or slave mode. Figure 3 shows the board configuration when the CODEC is set up to operate in master mode ...

Page 9

... Set up the CS42L52 in the CODEC Configuration, Analog Input Volume Control, DSP Engine or Analog and PWM Output Volume Controls tab as desired. 7. Begin evaluating the CS42L52. For quick set-up, the CRD42L52 may, alternatively, be configured by loading a predefined sample script file the File menu, click Restore Board Registers... 9. Browse to Boards\CRD42L52\Scripts\. ...

Page 10

... CODEC Configuration Tab The “CODEC Configuration” tab provides high-level control of various configurations for the CRD42L52. Status text detailing the CODEC’s specific configuration appears directly below the associated control. This text will change depending on the setting of the associated control. A description of each group is outlined below ...

Page 11

... Analog Volume Control - Includes all analog volume controls and adjustments for the PGA. Noise Gate Configuration - Includes all configuration settings for the noise gate. Update - Reads all registers in the CS42L52 and reflects the current values in the GUI. Reset - Resets the CS42L52. DS680RD1 Figure 5. Analog Input Volume Tab CRD42L52 11 ...

Page 12

... Tone Control - Bass and treble volume controls and filter corner frequencies. Beep Generator - On/Off time, frequency, volume, mix and repeat beep functions. Update - Reads all registers in the CS42L52 and reflects the current values in the GUI. Reset - Resets the CS42L52. 12 Figure 6. DSP Engine Tab CRD42L52 DS680RD1 ...

Page 13

... PWM Output - Volume, mute, power down and other functional controls for the PWM speaker outputs. Temperature and Battery Monitor/Control - Battery Compensation, Thermal Foldback, Temperature Shut- down and Battery Monitor for the PWM/Speaker outputs. DS680RD1 Figure 7. Analog and PWM Output Volume Tab CRD42L52 13 ...

Page 14

... Register values can be modified bit-wise or byte-wise. For bit-wise, click the appropriate push-button for the desired bit. For byte-wise, the desired hex value can be typed directly into the register address box in the register map. The “GPIO” tab may be ignored. 14 Figure 8. Register Maps Tab CRD42L52 DS680RD1 ...

Page 15

... Figure 10. Freq. Resp. - Line In to S/PDIF Out +0 -10 -20 -30 -40 - -80 -90 -100 -110 -120 -130 -140 2k 5k 10k 20k 20 Figure 12. FFT - S/PDIF Out @ 0 dBFS CRD42L52 50 100 200 500 10k 20k Hz 50 100 200 500 10k 20k Hz Figure 12. 15 ...

Page 16

... B -80 r -82 A -84 -86 -88 -90 -92 -94 -96 -98 -100 2k 5k 10k 20k 20 Figure 18. Dynamic Range - Line Out (Dig. LB) CRD42L52 50 100 200 500 10k 20k Hz 50 100 200 500 10k 20k Hz 50 100 200 500 10k 20k Hz DS680RD1 ...

Page 17

... B r -76 A -78 -80 -82 -84 -86 -88 - 100 200 500 1k Hz Figure 19. THD + N - Line Out (Dig. LB) DS680RD1 2k 5k 10k 20k CRD42L52 17 ...

Page 18

... Stereo jack for line level input signal to analog input channel 1 on CS42L52. Output Stereo jack for monitoring stereo headphone output from CS42L52. Screw Terminals for monitoring differential stereo speaker output from Output CS42L52. I/O routing between CDB42LDB1 and CRD42L52 containing Control Port Input/Output and Serial Audio Clock and Data . CRD42L52 Description Description ...

Page 19

... CRD42L52 AND CDB42LDB1 BLOCK DIAGRAM Speaker CRD42L52 Left + Line Input - CS42L52 Right + Headphone - Output I²C Power Control SAI Supply Port J5 USB J3 Microcontroller I²C Control Port Interface Placeholder Micro Reset Pushbutton I/O Header S/PDIF Serial Audio Interface Input MCLK S/PDIF Rx 12.288 MHz ...

Page 20

... CRD42L52 SCHEMATICS Figure 21. CS42L52 and Analog I/O ...

Page 21

CDB42LDB1 SCHEMATICS Figure 22. S/PDIF Input/Output ...

Page 22

Figure 23. Microcontroller, Push Buttons and LED Indicators ...

Page 23

... CRD42L52 LAYOUT Figure 24. Silkscreen Top Figure 25. Silkscreen Bottom Figure 26. Top-Side Layer DS680RD1 CRD42L52 Figure 27. Internal Layer (Ground Plane) Figure 28. Internal Layer (Power Plane) Figure 29. Bottom-Side Layer 23 ...

Page 24

... LAYOUT 24 Figure 30. Silkscreen Top Figure 31. Silkscreen Bottom CRD42L52 DS680RD1 ...

Page 25

... DS680RD1 Figure 32. Top-Side Layer Figure 33. Layer 2 CRD42L52 25 ...

Page 26

... Figure 34. Layer 3 Figure 35. Bottom-Side Layer CRD42L52 DS680RD1 ...

Page 27

... HISTORY Release RD1 Initial Release DS680RD1 Changes CRD42L52 27 ...

Page 28

... Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners. I² registered trademark of Philips Semiconductor. Microsoft and Windows are registered trademarks of Microsoft Corporation. 28 www.cirrus.com. CRD42L52 DS680RD1 ...

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