CRD42L52 Cirrus Logic Inc, CRD42L52 Datasheet - Page 15

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CRD42L52

Manufacturer Part Number
CRD42L52
Description
REFERENCE DESIGN FOR CS42L52
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of CRD42L52

Main Purpose
Audio, CODEC
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
CS42L52
Primary Attributes
2 Stereo Analog Inputs, Stereo Line and Headphone Outputs, S/PDIF Transmitter and Receiver
Secondary Attributes
Graphical User Interface
Product
Audio Modules
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Other names
598-1580
DS680RD1
5. PERFORMANCE PLOTS
Test conditions (unless otherwise specified): Input test signal is a full-scale 997 Hz sine wave; measurement band-
width is 20 Hz to 20 kHz (unweighted); VA=VD=VA_HP=1.8 V; Sample Frequency = 48 kHz; HP test load:
R
Notes:
L
= 10 kΩ.
Figure 9. Dynamic Range - Line In to S/PDIF Out
1. The total harmonic distortion + noise (THD+N) performance of the ADC in the CS42L52 is determined by
B
S
d
B
F
S
d
F
Figure 11. THD + N - Line In to S/PDIF Out
-52.5
-57.5
-62.5
-67.5
-72.5
-77.5
-82.5
-87.5
-92.5
-97.5
-52.5
-57.5
-62.5
-67.5
-72.5
-77.5
-82.5
-87.5
-92.5
-97.5
-100
-100
the value of the capacitor on the FILT+ pin. Larger capacitor values yield significant improvement in THD+N
at low frequencies. A 1 uF capacitor was used to make the performance measurement in
-50
-55
-60
-65
-70
-75
-80
-85
-90
-95
-50
-55
-60
-65
-70
-75
-80
-85
-90
-95
20
20
50
50
100
*
100
(Note 1)
200
200
500
500
Hz
Hz
1k
1k
2k
2k
5k
5k
10k
10k
20k
20k
d
B
F
S
Figure 12. FFT - S/PDIF In to HP Out @ 0 dBFS
B
A
Figure 10. Freq. Resp. - Line In to S/PDIF Out
d
r
+4.5
+3.5
+2.5
+1.5
+0.5
-0.5
-1.5
-2.5
-3.5
-4.5
-100
-110
-120
-130
-140
+5
+4
+3
+2
+1
-10
-20
-30
-40
-50
-60
-70
-80
-90
-0
-1
-2
-3
-4
-5
+0
20
20
50
50
100
100
200
200
500
500
Hz
Hz
1k
1k
2k
2k
Figure
CRD42L52
5k
5k
10k
10k
12.
20k
20k
15

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