CY4611B Cypress Semiconductor Corp, CY4611B Datasheet - Page 10

• Manufacturer Part Number: CY4611B
• Description: KIT USB TO ATA REFERENCE DESIGN
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-USB FX2LP™r

Specifications of CY4611B

• Main Purpose: Interface, USB 2.0 to ATA/CF
• Utilized Ic / Part: CY7C68013A, CY7C68014A, CY7C68015A, CY7C68016A
• Silicon Manufacturer: Cypress
• Silicon Core Number: UDMA-100
• Kit Application Type: Interface
• Application Sub Type: USB To ATA
• Rohs Compliant: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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bmATACBRegisterSelect
bATACBTransferBlockCount
Bit 4 DErrorOverride This bit controls the device error override feature. This bit
should not be set during a bmATACBActionSelect TaskFileRead.
0 = Data accesses are halted if a device error is detected
1 = Data accesses are not halted if a device error is detected
Bit 3 PErrorOverride This bit controls the phase error override feature. This bit
should not be set during a bmATACBActionSelect TaskFileRead.
0 = Data accesses are halted if a phase error is detected
1 = Data accesses are not halted if a phase error is detected
Bit 2 PollAltStatOverride This bit determines whether or not the Alternate Status
register will be polled and the BSY bit will be used to qualify the ATACB
operation.
0 = The AltStat register will be polled until BSY=0 before proceeding with the
ATACB operation
1 = The ATACB operation will be executed without polling the AltStat register.
Bit 1 DeviceSelectionOverride This bit determines when the device selection will
be performed in relation to the command register write accesses.
0 = Device selection will be performed prior to command register write accesses
1 = Device selection will be performed following command register write
accesses
Bit 0 TaskFileRead This bit determines whether or not the taskfile register data
selected in bmATACBRegisterSelect is returned. If this bit is set, the
dCBWDataTransferLength field must be set to 8.
0 = Execute ATACB command and data transfer (if any)
1 = Only read taskfile registers selected in bmATACBRegisterSelect and return
0x00h for all others. The format of the 12 bytes of returned data is as follows:
This field controls which of the taskfile register read or write accesses occur.
Taskfile read data will always be 8 bytes in length, and unselected register data
will be returned as 0x00. Register accesses occur in sequential order as outlined
below (0 to 7).
Bit 0 (0x3F6) Device Control / Alternate Status
Bit 1 (0x1F1) Features / Error
Bit 2 (0x1F2) Sector Count
Bit 3 (0x1F3) Sector Number
Bit 4 (0x1F4) Cylinder Low
Bit 5 (0x1F5) Cylinder High
Bit 6 (0x1F6) Device / Head
Bit 7 (0x1F7) Command / Status
This value indicates the maximum requested block size in 512-byte incre ments.
This value must be set to the last value used for the “Sectors per block” in the
SET_MULTIPLE_MODE command. Legal values are 0, 1, 2, 4, 8, 16, 32, 64,
and 128 where 0 indicates 256 sectors per block. A command failed status will
be returned if an illegal value is used in the ATACB.
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Address offset 0x00 (0x3F6) Alternate Status
Address offset 0x01 (0x1F1) Features / Error
Address offset 0x02 (0x1F2) Sector Count
Address offset 0x03 (0x1F3) Sector Number
Address offset 0x04 (0x1F4) Cylinder Low
Address offset 0x05 (0x1F5) Cylinder High
Address offset 0x06 (0x1F6) Device / Head
Address offset 0x07 (0x1F7) Command / Status
EZ-USB FX2LP USB to ATA Reference Design Notes
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