MAX107EVKIT Maxim Integrated Products, MAX107EVKIT Datasheet - Page 15

• Manufacturer Part Number: MAX107EVKIT
• Description: EVAL KIT FOR MAX107
• Manufacturer: Maxim Integrated Products

Specifications of MAX107EVKIT

• Number Of Adc's: 2
• Number Of Bits: 6
• Sampling Rate (per Second): 400M
• Data Interface: Parallel
• Inputs Per Adc: 1 Differential
• Input Range: 800 mVpp
• Power (typ) @ Conditions: 2.6W @ 400MSPS
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: MAX105, MAX107
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 7. Output Timing Relationship Between CLK and DREADY Signals and Primary/Auxiliary Output Ports
edge of the data ready clock. The auxiliary data port
always contains the older sample. The primary output
always contains the most recent data sample, regard-
less of the DREADY clock phase.
timing and data alignment of the auxiliary and primary
output ports in relationship with the CLK and DREADY
signals. Data in the primary port is delayed by five
clock cycles while data in the auxiliary port is delayed
by six clock cycles.
Quadrature amplitude modulation (QAM) is frequently
used in digital communication systems to increase
channel capacity. A QAM signal is modulated in both
DATA PORT
DATA PORT
AUXILIARY
DREADY+
PRIMARY
DREADY-
DREADY
NOTE: THE LATENCY TO THE PRIMARY PORT IS FIVE CLOCK CYCLES, THE LATENCY TO THE AUXILIARY PORT IS SIX CLOCK
CLK+
CLK-
CLK
CYCLES. BOTH PRIMARY AND AUXILIARY DATA PORTS ARE UPDATED ON THE RISING EDGE OF THE DREADY+ CLOCK.
N
______________________________________________________________________________________
ADC SAMPLE
N+1
Dual, 6-Bit, 400Msps ADC with On-Chip,
N+2
Typical I/Q Application
N+3
N+4
Figure 7 shows the
AUXILIARY PORT DATA
PRIMARY PORT DATA
MAX107 ADCs SAMPLE ON THE RISING EDGE OF CLK+
N+5
N+6
CLK-
CLK+
t
PWH
N+7
N+1
N
N+8
Wideband Input Amplifier
N+9
N+2
N+3
t
PD1
t
PD2
amplitude and phase. With a demodulator, this QAM
signal gets downconverted and separated in its in-
phase (I) and quadrature (Q) components. Both I&Q
channels are digitized by an ADC at the baseband
level in order to recover the transmitted information.
Figure 8 shows a typical application circuit to directly
tune L-band signals to baseband, incorporating a
direct conversion tuner (MAX2108) and the MAX107 to
digitize I&Q channels with excellent phase- and gain-
matching. A front-end L-C filter is required for anti-alias-
ing purposes.
N+10 N+11
t
PWL
N+4
N+5
N+12
DREADY -
DREADY +
N+13
N+6
N+7
N+14
N+8
N+9
N+15
N+16 N+17 N+18
N+10
N+11
N+19
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