MAX97000EVKIT+ Maxim Integrated Products, MAX97000EVKIT+ Datasheet - Page 30

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MAX97000EVKIT+

Manufacturer Part Number
MAX97000EVKIT+
Description
KIT EVALUATION FOR MAX97000
Manufacturer
Maxim Integrated Products
Datasheets

Specifications of MAX97000EVKIT+

Description/function
Audio Amplifiers
Operating Supply Voltage
2.7 V to 5.5 V
Product
Audio Development Tools
Supply Current
1 A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
MAX97000
Audio Subsystem with Mono Class D
Speaker and Class H Headphone Amplifier
30
The slave address with the R/W bit set to 0 indicates that
the master intends to write data to the MAX97000. The
MAX97000 acknowledges receipt of the address byte
during the master-generated 9th SCL pulse.
The second byte transmitted from the master configures
the MAX97000’s internal register address pointer. The
pointer tells the MAX97000 where to write the next byte
of data. An acknowledge pulse is sent by the MAX97000
upon receipt of the address pointer data.
The third byte sent to the MAX97000 contains the data
that is written to the chosen register. An acknowledge
pulse from the MAX97000 signals receipt of the data
byte. The address pointer autoincrements to the next
register address after each received data byte. This
autoincrement feature allows a master to write to sequen-
tial registers within one continuous frame. The master
signals the end of transmission by issuing a STOP condi-
tion. Register addresses greater than 0x09 are reserved.
Do not write to these addresses.
Send the slave address with the R/W bit set to 1 to initiate
a read operation. The MAX97000 acknowledges receipt
of its slave address by pulling SDA low during the 9th
SCL clock pulse. A START command followed by a read
command resets the address pointer to register 0x00.
Figure 12. Reading 1 Byte of Data from the MAX97000
Figure 13. Reading n-Bytes of Data from the MAX97000
S
ACKNOWLEDGE FROM MAX97000
S
ACKNOWLEDGE FROM MAX97000
SLAVE ADDRESS
SLAVE ADDRESS
R/W
R/W
0
0
ACKNOWLEDGE FROM MAX97000
ACKNOWLEDGE FROM MAX97000
REGISTER ADDRESS
Read Data Format
REGISTER ADDRESS
REPEATED START
REPEATED START
A
Sr
ACKNOWLEDGE FROM MAX97000
A
Sr
ACKNOWLEDGE FROM MAX97000
SLAVE ADDRESS
The first byte transmitted from the MAX97000 are the
contents of register 0x00. Transmitted data is valid on
the rising edge of SCL. The address pointer autoincre-
ments after each read data byte. This autoincrement
feature allows all registers to be read sequentially within
one continuous frame. A STOP condition can be issued
after any number of read data bytes. If a STOP condition
is issued followed by another read operation, the first
data byte to be read is from register 0x00.
The address pointer can be preset to a specific register
before a read command is issued. The master presets
the address pointer by first sending the MAX97000’s
slave address with the R/W bit set to 0 followed by the
register address. A REPEATED START condition is then
sent followed by the slave address with the R/W bit set
to 1. The MAX97000 then transmits the contents of the
specified register. The address pointer autoincrements
after transmitting the first byte.
The master acknowledges receipt of each read byte
during the acknowledge clock pulse. The master must
acknowledge all correctly received bytes except the last
byte. The final byte must be followed by a not acknowl-
edge from the master and then a STOP condition. Figure
12 illustrates the frame format for reading 1 byte from
the MAX97000. Figure 13 illustrates the frame format for
reading multiple bytes from the MAX97000.
SLAVE ADDRESS
R/W
R/W
1
A
1
NOT ACKNOWLEDGE FROM MASTER
A
DATA BYTE
1 BYTE
REGISTER ADDRESS POINTER
DATA BYTE
AUTOINCREMENT INTERNAL
1 BYTE
REGISTER ADDRESS POINTER
AUTOINCREMENT INTERNAL
A
A
P
P

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