ADP1829-EVALZ Analog Devices Inc, ADP1829-EVALZ Datasheet
ADP1829-EVALZ
Specifications of ADP1829-EVALZ
Related parts for ADP1829-EVALZ
ADP1829-EVALZ Summary of contents
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... MOSFETs for point-of-load regulators. The two channels operate 180° out of phase, reducing stress on the input capacitor and allowing smaller, low cost components. The ADP1829 is ideal for a wide range of high power applications, such as DSP and processor core I/O power, and general-purpose power in telecommunications, medical imaging, PC, gaming, and industrial applications ...
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... ADP1829 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 Typical Application Circuit ............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 Absolute Maximum Ratings ............................................................ 5 ESD Caution .................................................................................. 5 Functional Block Diagram .............................................................. 6 Pin Configuration and Function Descriptions ............................. 7 Typical Performance Characteristics ............................................. 9 Theory of Operation ...................................................................... 13 Input Power ................................................................................. 13 Start-Up Logic ............................................................................. 13 Internal Linear Regulator .......................................................... 13 Oscillator and Synchronization ................................................ 13 Error Amplifier ...
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... VREG VREG = 4 V VREG < 0 100 mA, IN < VREG SYNC = GND FREQ = GND (300 kHz) FREQ = GND (300 kHz) SS1, SS2 = GND SS1, SS2 = 0.6 V SS1, SS2 = 500 mV TRK1, TRK2 = 500 mV Rev Page ADP1829 = 25°C. A Min Typ Max Unit 5 3.0 5.5 V 1.5 ...
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... ADP1829 Parameter OSCILLATOR Oscillator Frequency 2 SYNC Synchronization Range SYNC Minimum Input Pulse Width CURRENT SENSE CSL1, CSL2 Threshold Voltage CSL1, CSL2 Output Current Current Sense Blanking Period GATE DRIVERS DH1, DH2 Rise Time DH1, DH2 Fall Time DL1, DL2 Rise Time ...
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... Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION < +85°C A < +125° dependent on the o = 125 C), the maximum ), and the junction- D_MAX ) JA – (θ × J_MAX_OP JA D_MAX Rev Page ADP1829 ...
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... FAULT1 + RAMP2 – – + 0.75V + + + – + 0.8V – 0.55V FAULT2 BOTTOM PADDLE OF LFCSP Figure 2. Rev Page ADP1829 BST1 ILIM2 DH1 CK1 S Q SW1 PWM DL1 + PGND1 ILIM1 – CSL1 POK1 BST2 DH2 CK2 S Q SW2 PWM PV ...
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... FREQ Frequency Select Input. Low for 300 kHz or high for 600 kHz. 4 GND Ground. Connect to a ground plane directly beneath the ADP1829. Tie the bottom of the feedback dividers to this GND. 5 UV2 Input to the POK2 Undervoltage and Overvoltage Comparators. For the default thresholds, connect UV2 directly to FB2 ...
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... LDO Shut-Down Input. Only used to shut down the LDO in those applications where IN is tied directly to VREG. Otherwise, connect LDOSD to GND or leave it open has an internal 100 kΩ pull-down resistor Input Supply to the Internal Linear Regulator. Drive IN with 5 power the ADP1829 from the LDO. For input voltages between 3.0 V and 5.5 V, tie IN to VREG and PV. 29 VREG Output of the Internal Linear Regulator (LDO). The internal circuitry and gate drivers are powered from VREG. Bypass VREG to ground plane with 1 μ ...
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... LOAD CURRENT (A) Figure 7. Efficiency vs. Load Current 4.980 4.975 4.970 4.965 4.960 –40 – TEMPERATURE (°C) Figure 8. VREG Voltage vs. Temperature 4.970 4.968 4.966 4.964 4.962 4.960 4.958 4.956 4.954 4.952 4.950 INPUT VOLTAGE (V) Figure 9. VREG vs. Input Voltage Load ADP1829 1.8 V OUT ...
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... ADP1829 4.960 4.956 4.952 4.948 4.944 4.940 LOAD CURRENT (mA) Figure 10. VREG vs. Load Current 100 150 LOAD CURRENT (mA) Figure 11. VREG Current-Limit Foldback T VREG, AC-COUPLED, 1V/DIV SW1 PIN, V OUT SW2 PIN 1.2V, 10V/DIV OUT 200ns/DIV Figure 12. VREG Output During Normal Operation 0.6010 0.6005 ...
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... EXTERNAL CLOCK, FREQUENCY = 1MHz SW PIN, CHANNEL 1 Figure 19. Out-of-Phase Switching, External 1 MHz Clock = EXTERNAL CLOCK, FREQUENCY = 2MHz SW PIN, CHANNEL 1 Figure 20. Out-of-Phase Switching, External 2 MHz Clock V = 12V IN Figure 21. Enable Pin Response, V Rev Page ADP1829 SW PIN, CHANNEL 2 400ns/DIV SW PIN, CHANNEL 2 200ns/DIV 2V/DIV OUT1 EN1, 5V/DIV 10ms/DIV = ...
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... ADP1829 T SOFT START, 1V/DIV 4ms/DIV Figure 22. Power-On Response, EN Tied to IN TRACK PIN VOLTAGE, T 200mV/DIV FEEDBACK PIN VOLTAGE, 200mV/DIV 20ms/DIV Figure 23. Output Voltage Tracking Response V , 5V/DIV IN EN2 PIN, 5V/DIV V , 2V/DIV OUT Rev Page 2V/DIV OUT2 V , 2V/DIV OUT1 EN1 = 5V 40ms/DIV Figure 24. Coincident Voltage Tracking Response ...
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... LFCSP. INPUT POWER The ADP1829 is powered from the IN pin The internal low dropout linear regulator, VREG, regulates the IN voltage down The control circuits, gate drivers, and external boost capacitors operate from the LDO output. Tie the PV pin to VREG and bypass VREG with a 1 μ ...
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... The ADP1829 features tracking inputs (TRK1 and TRK2) that make the output voltages track another, master voltage. This is especially useful in core and I/O voltage sequencing applications where one output of the ADP1829 can be set to track and not exceed the other other multiple output systems where specific sequencing is required. ...
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... This can provide an advantage, for example, in the case of high frequency operation from very high input voltage. Dissipation on the ADP1829 can be limited by running IN from a lower voltage rail while operating the switches from the high voltage rail. The switching cycle is initiated by the internal clock signal. The high-side MOSFET is turned on by the DH driver, and the SW node goes high, pulling up on the inductor ...
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... ADP1829 APPLICATIONS INFORMATION SELECTING THE INPUT CAPACITOR The input current to a buck converter is a pulse waveform zero when the high-side switch is off and approximately equal to the load current when it is on. The input capacitor carries the input ripple current, allowing the input power source to supply only the dc current ...
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... DSON V IN where the conduction power loss the MOSFET on resistance. DSON The gate charge losses are dissipated by the ADP1829 regulator and gate drivers and affect the efficiency of the system. The gate charge loss is approximated by the equation P ≈ where the gate charge power. ...
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... I is the peak inductor current. LPK In addition, the ADP1829 offers a technique for implementing a current-limit foldback in the event of a short circuit with the use of an additional resistor, as shown in Figure 25. Resistor R is largely responsible for setting the foldback current limit during ...
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... V ⎜ ⎟ log ⎜ ⎟ MOD V ⎝ ⎠ RAMP ⎛ ⎞ V ⎜ ⎟ log ⎜ ⎟ MOD ⎝ ⎠ lower than 1 the percentage of RAMP ⎛ ⎞ ⎜ ⎟ = FREQ ⎜ ⎟ RAMP f ⎝ ⎠ SYNC ADP1829 FREQUENCY (23) (24) (25) ...
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... ADP1829 The rest of the system gain is needed to reach crossover. The total gain of the system, therefore, is given MOD FILTER COMP where the gain of the PWM modulator. MOD A is the gain of the LC filter including the effects of FILTER the ESR zero the gain of the compensated error amplifier. ...
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... << Equation 29 is simplified π Equation 36 and Equation 37 yields π (dB –90° PHASE –270° TOP FROM V OUT EA R BOT COMP VREF 0V Figure 29. Type III Compensation π π TOP RAMP π ADP1829 . SW (36) (37) (38) TO PWM VRAMP (39) (40) (41) (42) (43) ...
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... Analog Devices, Inc. applications support team. SOFT START The ADP1829 uses an adjustable soft start to limit the output voltage ramp-up period, thus limiting the input inrush current. The soft start is set by selecting the capacitor, C SS2 to GND ...
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... Rev Page voltage. The ratio of the slave output voltage to the ⎛ ⎞ R ⎜ ⎟ + TOP 1 ⎜ ⎟ ⎝ ⎠ BOT = OUT ⎛ ⎞ R ⎜ ⎟ MASTER + TRKT 1 ⎜ ⎟ R ⎝ ⎠ TRKB resistor of the master voltage into BOT TRKB ADP1829 (52) greater than ...
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... THERMAL CONSIDERATIONS The current required to drive the external MOSFETs comprises the vast majority of the power dissipation of the ADP1829. The on-chip LDO regulates down and this 5 V supplies the drivers. The full gate drive current passes through the LDO and is the same as is then dissipated in the gate drivers ...
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... For example offset between ground on the ADP1829 and the converter power output causes a 1% error in the converter output voltage. Rev Page ADP1829 ...
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... ADP1829 LFCSP PACKAGE CONSIDERATIONS The LFCSP package has an exposed die paddle on the bottom that efficiently conducts heat to the PCB. To achieve the optimum performance from the LFCSP package, give special consideration to the layout of the PCB. Use the following layout guidelines for the LFCSP package. ...
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... APPLICATION CIRCUITS The ADP1829 controller can be configured to regulate outputs with loads of more than the power components, such as the inductor, MOSFETs and the bulk capacitors, are chosen carefully to meet the power requirement. The maximum load and power dissipation are limited by the powertrain components. ...
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... ADP1829 The ADP1829 can also be configured to drive an output load of less than 1 A. Figure 35 shows a typical application circuit that drives 1.5 A and 3 A loads in all multilayer ceramic capacitor (MLCC) solutions. Note that the two MOSFETs used in this example are dual-channel MOSFETs in a PowerPAK® SO-8 V 10µ ...
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... SEATING PLANE ORDERING GUIDE 1, 2 Model Temperature Range ADP1829ACPZ-R7 −40°C to +85°C ADP1829-EVALZ ADP1829-BL1-EVZ ADP1829-BL2-EVZ RoHS Compliant Part. 2 For the ADP1829-BL1-EVZ and the ADP1829-BL2-EVZ, users can generate schematic design and build of materials from the Analog Devices, Inc., ADIsimPower™ at www.analog.com/ADIsimPower. ...
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... ADP1829 NOTES Rev Page ...
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... NOTES Rev Page ADP1829 ...
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... ADP1829 NOTES ©2007–2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06784-0-1/11(B) Rev Page ...