LM3676SD-ADJEV National Semiconductor, LM3676SD-ADJEV Datasheet - Page 16

• Manufacturer Part Number: LM3676SD-ADJEV
• Description: BOARD EVALUATION LM3676SD-ADJ
• Manufacturer: National Semiconductor

Specifications of LM3676SD-ADJEV

• Main Purpose: DC/DC, Step Down
• Outputs And Type: 1, Non-Isolated
• Voltage - Output: 1 ~ 3.3V
• Current - Output: 600mA
• Voltage - Input: 2.9 ~ 5.5V
• Regulator Topology: Buck
• Frequency - Switching: 2MHz
• Board Type: Fully Populated
• Utilized Ic / Part: LM3676
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power - Output: -
• Lead Free Status / Rohs Status: Not Compliant

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BOARD LAYOUT CONSIDERATIONS
PC board layout is an important part of DC-DC converter de-
sign. Poor board layout can disrupt the performance of a DC-
DC converter and surrounding circuitry by contributing to EMI,
ground bounce, and resistive voltage loss in the traces. These
can send erroneous signals to the DC-DC converter IC, re-
sulting in poor regulation or instability.
Good layout for the LM3676 can be implemented by following
a few simple design rules below. Refer to Figure 8 for top layer
board layout.
1.
2.
3.
Place the LM3676, inductor and filter capacitors close
together and make the traces short. The traces between
these components carry relatively high switching
currents and act as antennas. Following this rule reduces
radiated noise. Special care must be given to place the
input filter capacitor very close to the V
Arrange the components so that the switching current
loops curl in the same direction. During the first half of
each cycle, current flows from the input filter capacitor
through the LM3676 and inductor to the output filter
capacitor and back through ground, forming a current
loop. In the second half of each cycle, current is pulled
up from ground through the LM3676 by the inductor to
the output filter capacitor and then back through ground
forming a second current loop. Routing these loops so
the current curls in the same direction prevents magnetic
field reversal between the two half-cycles and reduces
radiated noise.
Connect the ground pins of the LM3676 and filter
capacitors together using generous component-side
copper fill as a pseudo-ground plane. Then, connect this
to the ground-plane (if one is used) with several vias. This
reduces ground-plane noise by preventing the switching
IN
and GND pin.
16
4.
5.
6.
In mobile phones, for example, a common practice is to place
the DC-DC converter on one corner of the board, arrange the
CMOS digital circuitry around it (since this also generates
noise), and then place sensitive preamplifiers and IF stages
on the diagonally opposing corner. Often, the sensitive cir-
cuitry is shielded with a metal pan and power to it is post-
regulated to reduce conducted noise, using low-dropout
linear regulators.
currents from circulating through the ground plane. It also
reduces ground bounce at the LM3676 by giving it a low-
impedance ground connection. Connect SGND to PGND
at one single point within the board layout.
Use wide traces between the power components and for
power connections to the DC-DC converter circuit. This
reduces voltage errors caused by resistive losses across
the traces.
Route noise sensitive traces, such as the voltage
feedback path, away from noisy traces between the
power components. The voltage feedback trace must
remain close to the LM3676 circuit and should be direct
but should be routed opposite to noisy components. This
reduces EMI radiated onto the DC-DC converter’s own
voltage feedback trace. A good approach is to route the
feedback trace on another layer and to have a ground
plane between the top layer and layer on which the
feedback trace is routed. In the same manner for the
adjustable part it is desired to have the feedback dividers
on the bottom layer.
Place noise sensitive circuitry, such as radio IF blocks,
away from the DC-DC converter, CMOS digital blocks
and other noisy circuitry. Interference with noise-
sensitive circuitry in the system can be reduced through
distance.