C8051F410-TB Silicon Laboratories Inc, C8051F410-TB Datasheet - Page 267

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C8051F410-TB

Manufacturer Part Number
C8051F410-TB
Description
BOARD PROTOTYPING W/C8051F410
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F410-TB

Contents
Board
Processor To Be Evaluated
C8051F41x
Interface Type
USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F410
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
26.2. C2 Pin Sharing
The C2 protocol allows the C2 pins to be shared with user functions so that in-system debugging and
Flash programming functions may be performed. This is possible because C2 communication is typically
performed when the device is in the halt state, where all on-chip peripherals and user software are stalled.
In this halted state, the C2 interface can safely ‘borrow’ the C2CK (/RST) and C2D (P2.0) pins. In most
applications, external resistors are required to isolate C2 interface traffic from the user application. A typi-
cal isolation configuration is shown in Figure 26.1.
The configuration in Figure 26.1 assumes the following:
Additional resistors may be necessary depending on the specific application.
1. The user input (b) cannot change state while the target device is halted.
2. The /RST pin on the target device is used as an input only.
/Reset (a)
Output (c)
Input (b)
Figure 26.1. Typical C2 Pin Sharing
C2 Interface Master
Rev. 1.1
C2CK
C2D
C8051Fxxx
C8051F410/1/2/3
267

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