EDK2676 Renesas Electronics America, EDK2676 Datasheet

Page 1

... EDK2676 U M SER ANUAL F H8S/2676 FLASH M N CHIP ICROCONTROLLER ...

Page 2

Preface Cautions 1. This document may be, wholly or partially, subject to change without notice. 2. All rights reserved. No one is permitted to reproduce or duplicate, in any form, a part or this entire document without Renesas Technology Europe ...

Page 3

T C ABLE OF ONTENTS ............................................................................................................................................. 3 ABLE OF ONTENTS ....................................................................................................................................... 4 TART UP NSTRUCTIONS 2.1. INSTALLING THE EVALUATION DEVELOPMENT KIT (EDK)........................................................................... 4 2.2. SERIAL CONNECTION ....................................................................................................................................... 4 2.3. POWER SUPPLY ................................................................................................................................................ ...

Page 4

TART UP NSTRUCTIONS 2. NSTALLING THE VALUATION Please refer to the quick start guide provided for initial installation of the EDK. A copy of the quick start guide and other information relating to this ...

Page 5

EDK B L OARD AYOUT The diagram shows a general layout of the EDK board. FLASH Programming Power NMI Switch BOOT LED Power LED User1 LED User2 LED RESET BOOT Switch Switch CJ5 9-Way D-Type CJ4 3.1. EDK B ...

Page 6

EDK O PERATION 4.1. USER INTERFACE The EDK provides three buttons for influencing the operation of the board. The purpose of each button is clearly marked next to it. Refer to the board layout for positions (Section 3) 1. ...

Page 7

C C RYSTAL HOICE The operating crystal frequency has been chosen to support the fastest operation with the fastest serial operating speeds. The value of the crystal is 14.7456MHz. This is multiplied by a factor of two to obtain ...

Page 8

M M EMORY AP Table 4-4 illustrates the EDK memory map for mode 4. Section End Section Start H’00000000 H’0003FFFF H’00040000 H’001FFFFF H’00200000 H’0027FFFF H’00280000 H’00FF9FFF H’00FFA000 H’00FFBFFF H’00FFC000 H’00FFFBFF H’00FFFC00 H’00FFFEFF H’00FFFF00 H’00FFFF1F H’00FFFF20 H’00FFFFFF 4.5. SRAM A ...

Page 9

The user LEDs are connected to the following ports: LED Port Pin Identifier USR1 P26 USR2 P27 Microcontroller Pin Functions on Port Pin Pin 59 PO6/TIOCA5/EDRAK0n/IRQ14n 58 PO7/TIOCB5/EDRAK1n/IRQ15n T 4-6: LED P C ABLE ORT ONNECTIONS 9 ...

Page 10

B O OARD PTIONS The EDK has a number of configuration settings set by jumpers CJ4 ( CJ5 ( and zero-ohm links. Common EDK functions can be set using the jumpers as described ...

Page 11

– CJ5 SER ODE ETTINGS CJ5 is used to set the operating mode of the microcontroller. These jumpers must be fitted at all times to ensure correct operation of the EDK. Jumper CJ 5-A User Mode ...

Page 12

ERIAL ORT ELECTION The programming serial port is connected to the RS232 connector by default. This allows direct programming of the EDK using the supplied software tools. A secondary serial port is available on the microcontroller ...

Page 13

EXTERNAL DEBUG HEADER This EDK does not include support for an external debugger 5. OOT ONTROL The method for placing the microcontroller device in to Boot mode for reprogramming has been incorporated into a complex programmable logic ...

Page 14

S D TATE IAGRAM Async Boot Mode Controller : Positive Logic (CTS+BootSw) . /Res Waiting Reset Timer /Res ResSw . /Res Res /Res . Reset Reset (BootSW + ResSw + CTS) . /Res F 5-2: CPLD S D IGURE ...

Page 15

M ICROCONTROLLER The following table lists the connections to each of the headers on the board. 6. EADER Pin Function No 1 PF7/ϕ 3 RESn 5 PF6/Asn 7 PF4/HWRn 9 PF2/LCASn/IRQ15n 11 PF0/WAITn 13 P64/TMO0/DACK0n/IRQ12n 15 P62/TMCI0/TEND0n/IRQ10n ...

Page 16

H J2 EADER Pin Function No 1 EXTAL 3 VSS 5 PG0/CS0n 7 PG2/CS2n 9 PH0/CS4n 11 P50/TxD2/IRQ0n 13 P52/SCK2/IRQ2n 15 PH2/CS6n/IRQ6n 17 PG4/BREQ0n 19 PG6/BREQn 21 P40/AN0 23 P42/AN2 25 VREF 27 P44/AN4 29 P46/AN6/DA0 31 P54/AN12/IRQ4n 33 ...

Page 17

C D ODE EVELOPMENT 7.1. HMON 7.1. ODE UPPORT The HMON library is built to support Advanced Expanded Mode only. 7.1. REAKPOINT UPPORT Code located in RAM may have multiple breakpoints limited only by the ...

Page 18

M M EMORY AP H'00000000 Vectors H'00000800 CUser_Vectors H'00000803 H'00001000 FDTInit H'0000111D H'00002026 PHMON CHMON H'0000422B On-Chip FLASH ROM H'0003F600 FDTUserModeMicr oKernel H'0003FE2D H'0003FFFF H'00FFA000 BHMON H'00FFA316 On-Chip RAM H'00FFBA00 Stack H'00FFBBFF H'00FFBFFF H'00FFFC00 Internal I/O REGISTERS H'00FFFEFF H'00FFFF20 ...

Page 19

AUD ATE ETTING HMON has initially set to connect at 115200Baud. Should the user wish to change this, the value for the BRR in HMONserialconfiguser.c will need to be changed and the project re-built. Please refer ...