AD10201/PCB Analog Devices Inc, AD10201/PCB Datasheet - Page 11

• Manufacturer Part Number: AD10201/PCB
• Description: KIT EVAL PCB FOR AD10201
• Manufacturer: Analog Devices Inc

Specifications of AD10201/PCB

• Rohs Status: RoHS non-compliant

APPLICATION NOTES
Theory of Operation
The AD10201 is a high-dynamic-range dual 12-bit, 105 MHz sub-
range pipeline converter that uses switched capacitor architecture.
The analog input section uses A
impedance of 50 Ω. The analog input includes an ac-coupled
wideband 1:1 transformer, which provides high dynamic range and
SNR while maintaining VSWR and gain flatness. The ADC includes
a high bandwidth linear track/hold that gives excellent spurious
performance up to and beyond the Nyquist rate. The high bandwidth
track/hold has a low jitter of 0.25 ps rms, leading to excellent SNR
and SFDR performance. AC-coupled differential PECL/ECL
encode inputs are recommended for optimum performance.
USING THE AD10201
ENCODE Input
Any high speed A/D converter is extremely sensitive to the quality
of the sampling clock provided by the user. A track/hold circuit
is essentially a mixer, and any noise, distortion, or timing jitter
on the clock will be combined with the desired signal at the A/D
output. For that reason, considerable care has been taken in the
design of the ENCODE input of the AD10201, and the user is
advised to give commensurate thought to the clock source. The
ENCODE inputs are fully TTL/CMOS compatible. For optimum
performance, the AD10201 must be clocked differentially. Note
that the ENCODE inputs cannot be driven directly from PECL
level signals (V
be accommodated by ac-coupling as shown in Figure 2. Good
performance is obtained using an MC10EL16 in the circuit to
drive the encode inputs.
ENCODE Voltage Level Definition
The voltage level definitions for driving ENCODE and ENCODE
in differential mode are shown in Figure 3 and Table II.
REV. 0
Description
Differential Signal
Differential Signal
Low Differential Input
Common-Mode
Amplitude (V
Amplitude (V
Voltage (V
Input (V
Figure 2. AC-Coupling to ENCODE Inputs
ENCODE
ENCODE
PECL
GATE
Figure 3. Differential Input Levels
IHD
ICN
510
Table II. ENCODE Inputs
ILD
is 3.5 V max). PECL level signals can easily
)
)
ID
ID
GND
)
)
V
V
V
ICM
IHD
ILD
510
IN
Min
500 mV
0 V
1.25 V
A2/B2 at 1.75 V p-p with an input
0.1 F
0.1 F
ENCODE
ENCODE
Nom
750 mV
1.6 V
V
AD10201
ID
Max
5 V
–11–
Often, the cleanest clock source is a crystal oscillator producing
a pure sine wave. In this configuration, or with any roughly sym-
metrical clock input, the input can be ac-coupled and biased to a
reference voltage that also provides the ENCODE. This ensures
that the reference voltage is centered on the encode signal.
Digital Outputs
The digital outputs are 3.3 V (2.7 V to 3.6 V) TTL/CMOS-
compatible for lower power consumption.
Analog Input
The analog input is a single-ended ac-coupled high performance
1:1 transformer with an input impedance of 50 Ω to 250 MHz.
The nominal full-scale input is 1.75 V p-p.
Special care was taken in the design of the analog input section
of the AD10201 to prevent damage and corruption of data when
the input is overdriven.
Voltage Reference
A stable and accurate 2.5 V voltage reference is designed into the
AD10201 (V
Timing
The AD10201 provides latched data outputs, with 10 pipeline
delays. Data outputs are available one propagation delay (t
the rising edge of the ENCODE command (see Figure 1). The
length of the output data lines and loads placed on them should
be minimized to reduce transients within the AD10201; these
transients can detract from the converter’s dynamic performance.
The minimum guaranteed conversion rate of the AD10201 is
10 MSPS. At internal clock rates below 10 MSPS dynamic perfor-
mance may degrade. Therefore, input clock rates below 10 MHz
should be avoided.
GROUNDING AND DECOUPLING
Analog and Digital Grounding
Proper grounding is essential in any high speed, high resolution
system. Multilayer printed circuit boards (PCBs) are recommended
to provide optimal grounding and power schemes. The use of
ground and power planes offers distinct advantages:
1. The minimization of the loop area encompassed by a signal
2. The minimization of the impedance associated with ground
3. The inherent distributed capacitor formed by the powerplane,
These characteristics result in both a reduction of electromagnetic
interference (EMI) and an overall improvement in performance.
It is important to design a layout that prevents noise from coupling
to the input signal. Digital signals should not be run in parallel
with input signal traces and should be routed away from the input
circuitry. The PCB should have a ground plane covering all unused
portions of the component side of the board to provide a low
impedance path and manage the power and ground currents. The
ground plane should be removed from the area near the input
pins to reduce stray capacitance.
and its return path.
and power paths.
PCB insulation, and ground plane.
REFOUT
). An external voltage reference is not required.
AD10201
PD
) after