AD10201/PCB Analog Devices Inc, AD10201/PCB Datasheet - Page 12

• Manufacturer Part Number: AD10201/PCB
• Description: KIT EVAL PCB FOR AD10201
• Manufacturer: Analog Devices Inc

Specifications of AD10201/PCB

• Rohs Status: RoHS non-compliant

AD10201
Solder Reflow Profile
The solder reflow profile provided in Figure 4 is recommended.
LAYOUT INFORMATION
The schematic of the evaluation board (Figures 5a–5d) represents
a typical implementation of the AD10201. The pinout of the
AD10201 is very straightforward and facilitates ease of use and the
implementation of high-frequency/high resolution design practices.
Quantity
2
1
2
4
8
32
23
2
2
4
4
8
2
10
8
4
4
1
2
4
250
200
150
100
50
0
0
Figure 4. Typical Solder Reflow Profile
Reference Designator
U16, U17
U1
U14, U15
R38, R39, R56, R58
R1, R7, R8, R41, R60, R61, R71, R72 51 Ω
R3, R4, R9–R18, R23–R30, R35,
R36, R40, R42–R46, R63–R66
C1, C2, C5–C10, C12, C16–C18,
C20–C26, C28, C33–C35
C13, C27
J1, J2
L1, L2, L3, L4
U2, U3, U9, U11
E3–E6, E25, E26, E33, E34
U4, U10
C3, C4, C11, C14, C15, C19,
C29, C30–C32
J3–J7, J10–J12
AD10201/AD10226 Evaluation Board
C36, C37
JP3, JP6, JP8, JP12
50
100
150
TIME – Seconds
BILL OF MATERIALS LIST FOR AD10201 EVALUATION BOARD
200
250
300
Value
33 kΩ
100 Ω
0.1 µF
0.47 µF CAP 0.47 µF 25 V Ceramic Y5V 0805
47 Ω
10 µF
0 Ω
350
400
Description
IC, Low Voltage 16-Bit D-Type Flip-Flop
with 5 V Tolerant Inputs and Outputs
IC, BGA 35
IC, Precision Low Dropout any CAP
Voltage Regulator
RES 33 kΩ 1/10W 0.1% 0805 SMD
RES 51 Ω 1/10W 5% 0805 SMD
RES 100 Ω 1/10W 1% 0805 SMD
CAP 0.1 µF 50 V Ceramic Y5V 0805
2
SMT Ferrite Bead
IC, 3.3 V/5 V ECL Differential
Receiver/Driver
Power Jack, Banana Plug
3.3 V Dual Differential
LVPECL-to-LVTTL Translator
Solid Tantalum Chip Capacitor,
10 µF, 16 V, 20%
SMA PLUG 200Mil STR GOLD
Spacer Aluminum, Hex M–F (Standoff)
Nut Hex Stl #4-40 UNC-2B
GS03983 Rev. A (PCB)
CAP 0.047 µF 25 V Ceramic Y5V 0603
RES 0 Ω 1/16 W 5% 0402
20 Male Connector Strip, 100 Centers
–12–
It is recommended that high quality ceramic chip capacitors be used
to decouple each supply pin to ground directly at the device. All
capacitors can be standard high quality ceramic chip capacitors.
Care should be taken when placing the digital output runs. Because
the digital outputs have such a high slew rate, the capacitive loading
on the digital outputs should be minimized. Circuit traces for the
digital outputs should be kept short and connect directly to the
receiving gate. Internal circuitry buffers the outputs of the AD9432
ADC through a resistor network to eliminate the need to exter-
nally buffer the device from the receiving gate.
EVALUATION BOARD
The AD10201 evaluation board (Figures 6a–6f) is designed to
provide optimal performance for evaluation of the AD10201
analog-to-digital converter. The board encompasses everything
needed to ensure the highest level of performance for evaluating
the AD10201. The board requires an analog input signal, encode
clock, and power supply inputs. The clock is buffered on-board
to provide clocks for the latches. The digital outputs and out
clocks are available at the standard 40-pin connectors J1 and J2.
Power to the analog supply pins is connected via banana jacks.
The analog supply powers the associated components and the
analog section of the AD10201. The digital outputs of the
AD10201 are powered via banana jacks with 3.3 V. Contact the
factory if additional layout or applications assistance is required.
35 385
Part Number
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108-0740-001 (Johnson Company)
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