AD9071/PCB Analog Devices Inc, AD9071/PCB Datasheet
AD9071/PCB
Specifications of AD9071/PCB
Related parts for AD9071/PCB
AD9071/PCB Summary of contents
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GENERAL DESCRIPTION The AD9071 is a monolithic sampling analog-to-digital con- verter with an on-chip track-and-hold circuit and TTL/CMOS digital interfaces. The product operates at a 100 MSPS conver- sion rate with outstanding dynamic performance over its full operating range. ...
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AD9071–SPECIFICATIONS Parameter RESOLUTION DC ACCURACY 1 Differential Nonlinearity 1 Integral Nonlinearity 1 No Missing Codes 2 Gain Error 2 Gain Tempco ANALOG INPUT Input Voltage Range (With Respect to AIN) Common-Mode Voltage Input Offset Voltage Input Resistance Input Capacitance Input ...
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Parameter 6 DYNAMIC PERFORMANCE Transient Response Overvoltage Recovery Time Signal-to-Noise Ratio (SNR) (Without Harmonics 10.3 MHz MHz IN Signal-to-Noise Ratio (SINAD) (With Harmonics 10.3 MHz MHz IN Effective ...
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... AD9071 Model Temperature Range AD9071BR –40°C to +85°C AD9071/PCB 25°C Pin No. Mnemonic 1, 7, 12, 21, 23 GND VREF OUT 4 VREF DNC AIN 9 10 AIN 13 ENCODE 14 OR 15–19, 24–28 D9–D0 20 PIN CONFIGURATION 28 GND VREF OUT VREF AD9071BR 7 TOP VIEW 22 GND (Not to Scale AIN ...
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SAMPLE N–1 SAMPLE N AIN ENCODE D9–D0 DATA N–4 DATA N–3 AIN VREF IN ENCODE SAMPLE N+3 SAMPLE N+1 SAMPLE N DATA N–2 DATA N– AIN V CC ...
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AD9071–Typical Performance Characteristics 0 FUNDAMENTAL = –1.0dBFS –10 SNR = 56.75dB SINAD = 56.56dB –20 2ND HARMONIC = –71.88dB 3RD HARMONIC = –77.28dB –30 –40 –50 –60 –70 –80 –90 –100 0 MHz 0 FUNDAMENTAL = –1.0dBFS –10 SNR = ...
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SNR SINAD –40 – SNR 58 56 SINAD –40 – ...
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AD9071 APPLICATION NOTES THEORY OF OPERATION The AD9071 employs a two-step subranging architecture with digital error correction. The sampling and conversion process is initiated by a rising edge at the ENCODE input. The analog input signal is buffered by a ...
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The minimum guaranteed conversion rate of the AD9071 is 40 MSPS. At clock rates below 40 MSPS, dynamic performance may degrade. The AD9070 will operate in bursts, but the user must flush the internal pipeline each time the clock restarts. ...
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AD9071 ...
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E3 VREF INT VREF 1 1 VREF EXT C7 S8 SMB 0 GND 0.1 F 100 ANALOG IN SMB A IN DIF ...
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AD9071 Item # Quantity Reference C1, C2, C3, C4, C5, C6, C7, C8, C9, C10, Ceramic Chip Capacitor, 0603, 0.1 µ C11, C12, C13, C14, C15, C16, C17, C22 2 4 C18, C19, C20, C21 3 3 E1, ...