AD9071/PCB Analog Devices Inc, AD9071/PCB Datasheet - Page 9

• Manufacturer Part Number: AD9071/PCB
• Description: BOARD EVAL FOR AD9071
• Manufacturer: Analog Devices Inc

Specifications of AD9071/PCB

• Rohs Status: RoHS non-compliant

The minimum guaranteed conversion rate of the AD9071 is
40 MSPS. At clock rates below 40 MSPS, dynamic performance
may degrade. The AD9070 will operate in bursts, but the user
must flush the internal pipeline each time the clock restarts.
Valid data will be produced on the fourth rising edge of the
ENCODE signal after the clock is restarted.
EVALUATION BOARD
The AD9071 evaluation board is a convenient and easy way to
evaluate the performance of the AD9071 in the SOIC package.
The board consists of an internal voltage reference or an optional
external reference, two 74LCX574 latches for capturing data
from the A/D converter, and an AD9760 DAC for viewing
reconstructed A/D data. The AD9071 output logic can be driven
at 5 V and 3.3 V levels. The latches are set up at 3.3 V but are
5 V tolerant. Test points are provided at Encode, DB9, DB0,
Data Ready, and Data Clock. All are clearly labeled.
Analog Input
The evaluation board can be driven single-ended or differen-
tially. Differential input requires using a 1:1 transformer. For
single-ended operation (J2), Jumper S5 is connected to S8 and
S6 is connected to S7. For differential input operation (J3), S5
is connected to S3 and S4 is connected to S6. The board is
shipped in the differential configuration.
Encode
The AD9071 encode inputs are driven single-ended into J1 and
are at TTL logic levels.
Data Out
The data delivered out of the AD9071 is in offset binary format
at TTL levels. The Data Ready signal can be inverted by open-
ing the S1 and S2 connections. An optional series termination
resistor on Data Ready (R33), normally 0 ohms, is provided to
support various user output impedance configurations. The
AD9760 DAC supports viewing reconstructed A/D data at J4.
Voltage Reference
The AD9071 can be operated using its internal voltage reference
(connect E2 to E3) or an optional external reference (connect
E1 to E2). The board is shipped utilizing the internal voltage
reference.
Layout
The AD9071 is not layout sensitive if some important guidelines
are met. The evaluation board layout provides an example where
these guidelines have been followed to optimize performance.
• Provide a good ground plane connecting the analog and
• Excellent bypassing is essential. Chip capacitors with 0.1 µF
• Separate power planes and supplies for the analog and digital
The AD9071 evaluation board is provided as a design example
for customers of Analog Devices. ADI makes no warranties
express, statutory, or implied regarding merchantability or fit-
ness for a particular purpose.
digital sections.
values and 0803 dimensions are placed flush against the pins.
Placing any of the capacitors on the bottom of the board can
degrade performance. These techniques reduce the amount
of parasitic inductance that can impact the bypassing ability
of the caps.
sections are recommended.
AD9071