EVAL-AD7654CB Analog Devices Inc, EVAL-AD7654CB Datasheet

BOARD EVAL FOR AD7654

EVAL-AD7654CB

Manufacturer Part Number
EVAL-AD7654CB
Description
BOARD EVAL FOR AD7654
Manufacturer
Analog Devices Inc
Series
PulSAR®r
Datasheets

Specifications of EVAL-AD7654CB

Number Of Adc's
2
Number Of Bits
16
Sampling Rate (per Second)
500k
Data Interface
Serial, Parallel
Inputs Per Adc
2 Differential
Input Range
0 ~ 5 V
Power (typ) @ Conditions
120mW @ 500kSPS
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
AD7654
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
FEATURES
Dual, 16-bit, 2-channel simultaneous sampling ADC
16-bit resolution with no missing codes
Throughput:
INL: ±3.5 LSB max (±0.0053% of full scale)
SNR: 89 dB typ @ 100 kHz
THD: −100 dB @ +100 kHz
Analog input voltage range: 0 V to 5 V
No pipeline delay
Parallel and serial 5 V/3 V interface
SPI®/QSPI™/MICROWIRE™/DSP compatible
Single 5 V supply operation
Power dissipation:
Packages:
Low cost
APPLICATIONS
AC motor control
3-phase power control
4-channel data acquisition
Uninterrupted power supplies
Communications
GENERAL DESCRIPTION
The AD7654 is a low cost, simultaneous sampling, dual-
channel, 16-bit, charge redistribution SAR, analog-to-digital
converter that operates from a single 5 V power supply. It
contains two low noise, wide bandwidth, track-and-hold
amplifiers that allow simultaneous sampling, a high speed
16-bit sampling ADC, an internal conversion clock, error
correction circuits, and both serial and parallel system interface
ports. Each track-and-hold has a multiplexer in front to provide
a 4-channel input ADC. The A0 multiplexer control input
allows the choice of simultaneously sampling input pairs
INA1/INB1 (A0 = low) or INA2/INB2 (A0 = high). The part
features a very high sampling rate mode (normal) and, for low
power applications, a reduced power mode (impulse) where the
power is scaled with the throughput. Operation is specified
from −40°C to +85°C.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
500 kSPS (normal mode)
444 kSPS (impulse mode)
120 mW typical
2.6 mW @ 10 kSPS
48-lead low profile quad flat package (LQFP)
48-lead lead frame chip scale package (LFCSP)
2-Channel, Simultaneous Sampling ADC
16-Bit, 500 kSPS PulSAR
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
Table 1. PulSAR Selection
Type/kSPS
Pseudo
Differential
True Bipolar
True Differential
18-Bit
Multichannel/
Simultaneous
PRODUCT HIGHLIGHTS
1.
2.
3.
4.
5.
RESET
INAN
INBN
INA2
INB2
INA1
INB1
PD
A0
Simultaneous Sampling.
The AD7654 features two sample-and-hold circuits that
allow simultaneous sampling. It provides inputs for four
channels.
Fast Throughput.
The AD7654 is a 500 kSPS, charge redistribution, 16-bit
SAR ADC with internal error correction circuitry.
Superior INL and No Missing Codes.
The AD7654 has a maximum integral nonlinearity of
3.5 LSB with no missing 16-bit codes.
Single-Supply Operation.
The AD7654 operates from a single 5 V supply. In impulse
mode, its power dissipation decreases with throughput.
Serial or Parallel Interface.
Versatile parallel or 2-wire serial interface arrangement is
compatible with both 3 V and 5 V logic.
AVDD AGND
AD7654
MUX
MUX
TRACK/HOLD
FUNCTIONAL BLOCK DIAGRAM
CALIBRATION CIRCUITRY
CONTROL LOGIC AND
×2
IMPULSE
MUX
100 to 250
AD7660/
AD7661
AD7653
AD7663
AD7675
AD7678
REFGND
SWITCHED
© 2005 Analog Devices, Inc. All rights reserved.
CAP DAC
CNVST
REFx
CLOCK
Figure 1.
500 to 570
AD7650/
AD7652
AD7664/
AD7666
AD7665
AD7676
AD7679
AD7654
DVDD
INTERFACE
PARALLEL
SERIAL
PORT
800 to 1000
DGND
AD7667
AD7671
AD7677
AD7674
AD7655
AD7654
www.analog.com
16
®
Dual,
OVDD
OGND
D[15:0]
SER/PAR
BUSY
CS
RD
A/B
BYTESWAP
EOC
>1000
AD7621
AD7623
AD7641

Related parts for EVAL-AD7654CB

EVAL-AD7654CB Summary of contents

Page 1

FEATURES Dual, 16-bit, 2-channel simultaneous sampling ADC 16-bit resolution with no missing codes Throughput: 500 kSPS (normal mode) 444 kSPS (impulse mode) INL: ±3.5 LSB max (±0.0053% of full scale) SNR typ @ 100 kHz THD: −100 dB ...

Page 2

... Serial Interface ............................................................................ 20 Master Serial Interface............................................................... 20 Slave Serial Interface .................................................................. 22 Microprocessor Interfacing....................................................... 24 SPI Interface (ADSP-219x) ....................................................... 24 Application Hints ........................................................................... 25 Layout .......................................................................................... 25 Evaluating the AD7654 Performance ...................................... 25 Outline Dimensions ....................................................................... 26 Ordering Guide .......................................................................... 27 11/04—Rev Rev. A Changes to Figure 7........................................................................ 12 Changes to Figure 18...................................................................... 15 Changes to Figure 19...................................................................... 16 Changes to Voltage Reference Input Section .............................. 17 Changes to Conversion Control Section ...

Page 3

SPECIFICATIONS AVDD = DVDD = 5 V, OVDD = 2 5.25 V; all specifications T Table 2. Parameter RESOLUTION ANALOG INPUT Voltage Range Common-Mode Input Voltage Analog Input CMRR Input Current 1 Input Impedance THROUGHPUT SPEED Complete Cycle ...

Page 4

AD7654 Parameter DIGITAL OUTPUTS 6 Data Format 7 Pipeline Delay POWER SUPPLIES Specified Performance AVDD DVDD OVDD 9 Operating Current AVDD DVDD OVDD Power Dissipation 11 TEMPERATURE RANGE Specified Performance 1 See the Analog Inputs section. ...

Page 5

TIMING SPECIFICATIONS AVDD = DVDD = 5 V, OVDD = 2 5.25 V; all specifications T Table 3. Parameter CONVERSION AND RESET (See Figure 22 and Figure 23) Convert Pulse Width Time Between Conversions (Normal Mode/Impulse Mode) CNVST ...

Page 6

AD7654 Parameter SLAVE SERIAL INTERFACE MODES (see Figure 32 and Figure 33) External SCLK Setup Time External SCLK Active Edge to SDOUT Delay SDIN Setup Time SDIN Hold Time External SCLK Period External SCLK High External SCLK Low 1 In ...

Page 7

ABSOLUTE MAXIMUM RATINGS Table 5. Parameter Values Analog Inputs 1 1 INAx , INBx , REFx, INxN, AVDD + 0 REFGND AGND − 0.3 V Ground Voltage Differences AGND, DGND, OGND ±0.3 V Supply Voltages AVDD, DVDD, OVDD ...

Page 8

AD7654 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 6. Pin Function Descriptions 1 Pin No. Mnemonic Type Description 1, 47, 48 AGND P Analog Power Ground Pin. 2 AVDD P Input Analog Power Pin. Nominally Multiplexer ...

Page 9

Pin No. Mnemonic Type Description 15 D[6] DI/O When SER/PAR is LOW, this output is used as Bit 6 of the parallel port data output bus. or INVSCLK When SER/PAR is HIGH, this input, part of the serial port, ...

Page 10

AD7654 1 Pin No. Mnemonic Type Description 35 CNVST DI Start Conversion. A falling edge on CNVST puts the internal sample-and-hold into the hold state and initiates a conversion. In impulse mode (IMPULSE = HIGH), if CNVST is held LOW ...

Page 11

TERMINOLOGY Integral Nonlinearity Error (INL) Linearity error refers to the deviation of each individual code from a line drawn from negative full scale through positive full scale. The point used as negative full scale occurs ½ LSB before the first ...

Page 12

AD7654 TYPICAL PERFORMANCE CHARACTERISTICS –1 –2 –3 –4 –5 0 16384 32768 CODE Figure 5. Integral Nonlinearity vs. Code 8000 7288 7220 7000 6000 5000 4000 3000 2000 953 903 1000 ...

Page 13

SNR 90 SINAD 85 ENOB 100 FREQUENCY (kHz) Figure 11. SNR, SINAD, and ENOB vs. Frequency –60 –50 –40 –30 –20 INPUT LEVEL (dB) Figure 12. SNR and SINAD ...

Page 14

AD7654 APPLICATION INFORMATION CIRCUIT INFORMATION The AD7654 is a very fast, low power, single-supply, precise, simultaneous sampling 16-bit ADC. The AD7654 provides the user with two on-chip, track-and- hold, successive approximation ADCs that do not exhibit any pipeline or latency, ...

Page 15

ANALOG SUPPLY (5V) + 10µF AD780 2.5V REF 1MΩ REF 50kΩ 1µF NOTE 1 100nF NOTE 2 NOTE 3 50Ω – 10Ω NOTE 4 U1 ANALOG INPUT A1 + 2.7nF C C NOTE 5 50Ω – 10Ω U2 ...

Page 16

AD7654 TYPICAL CONNECTION DIAGRAM Figure 18 shows a typical connection diagram for the AD7654. Different circuitry shown on this diagram is optional and is discussed in the following sections. ANALOG INPUTS Figure 19 shows a simplified analog input section of ...

Page 17

The AD8021 meets these requirements and is usually appro- priate for almost all applications. The AD8021 needs an external compensation capacitor of 10 pF. This capacitor should have good linearity as an NPO ceramic or mica type. The AD8022 could ...

Page 18

AD7654 1000 NORMAL 100 IMPULSE SAMPLING RATE (kSPS) Figure 21. Power Dissipation vs. Sample Rate CONVERSION CONTROL Figure 22 shows the detailed timing diagrams of the conversion process. The AD7654 is controlled by the signal ...

Page 19

CNVST t 16 BUSY EOC t 10 DATA PREVIOUS CHANNEL B PREVIOUS CHANNEL A BUS OR NEW Figure 24. Master Parallel Data Timing for Continuous Read ...

Page 20

AD7654 SERIAL INTERFACE The AD7654 is configured to use the serial interface when the SER/ PAR is held high. The AD7654 outputs 32 bits of data, MSB first, on the SDOUT pin. The order of the channels being output is ...

Page 21

EXT/INT = 0 CS, RD CNVST BUSY t 3 EOC SYNC SCLK SDOUT Figure 29. Master Serial Data Timing ...

Page 22

AD7654 SLAVE SERIAL INTERFACE External Clock The AD7654 is configured to accept an externally supplied serial data clock on the SCLK pin when the EXT/ INT pin is held high. In this mode, several methods can be used to read ...

Page 23

EXT/INT = 1 CS EOC BUSY SCLK SDOUT X D15 D14 SDIN D15 ...

Page 24

AD7654 MICROPROCESSOR INTERFACING The AD7654 is ideally suited for traditional dc measurement applications supporting a microprocessor and for ac signal processing applications interfacing to a digital signal processor. The AD7654 is designed to interface with either a parallel 8-bit wide ...

Page 25

... EVALUATING THE AD7654 PERFORMANCE A recommended layout for the AD7654 is outlined in the documentation of the evaluation board for the EVAL-AD7654CB. The evaluation board package includes a fully assembled and tested evaluation board, documentation, and software for controlling the board from a PC via the EVAL-CONTROL-BRD3 ...

Page 26

AD7654 OUTLINE DIMENSIONS 1.45 1.40 1.35 0.15 SEATING 0.05 PLANE VIEW A ROTATED 90° CCW 7.00 BSC SQ PIN 1 INDICATOR TOP VIEW 1.00 12° MAX 0.85 0.80 SEATING PLANE 0.75 1.60 0.60 MAX 0.45 0.20 0.09 7° 3.5° 0° ...

Page 27

... AD7654ASTRL –40°C to +85°C 1 AD7654ASTZ –40°C to +85°C AD7654ASTZRL 1 –40°C to +85°C 2 EVAL-AD7654CB 3 EVAL-CONTROL BRD2 3 EVAL-CONTROL BRD3 free part. 2 This board can be used as a standalone evaluation board or in conjunction with the EVAL-CONTROL-BRD2/EVAL-CONTROL-BRD3 for evaluation/demonstration purposes. ...

Page 28

AD7654 NOTES © 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C03057–0–11/05(B) Rev Page ...

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