AD5304 Analog Devices, AD5304 Datasheet
AD5304
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... Data Sheet FEATURES AD5304: 4 buffered 8-Bit DACs in 10-lead MSOP and 10-lead LFCSP A, W Version: ±1 LSB INL, B Version: ±0.625 LSB INL AD5314: 4 buffered 10-Bit DACs in 10-lead MSOP and 10-lead LFCSP A, W Version: ±4 LSB INL, B Version: ±2.5 LSB INL AD5324: 4 buffered 12-Bit DACs in 10-lead MSOP and 10-lead LFCSP A, W Version: ± ...
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... Serial Interface ............................................................................ 14 Power-Down Mode .................................................................... 16 Microprocessor Interfacing ....................................................... 16 Applications Information .............................................................. 18 Typical Application Circuit ....................................................... 18 Decoding Multiple AD5304/AD5314/AD5324s .................... 19 Power Supply Bypassing and Grounding ................................ 20 Outline Dimensions ....................................................................... 22 Ordering Guide .......................................................................... 23 Automotive Products ................................................................. 23 8/03—Rev Rev. D Added A Version ................................................................ Universal Changes to Features ...
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... V – 0.001 V – 0.001 DD DD 0.5 0 2.5 2 Rev Page AD5304/AD5314/AD5324 unless otherwise noted. MIN MAX 2 Max Unit Test Conditions/Comments Bits ±0.625 LSB ±0.25 LSB Guaranteed monotonic by design over all codes Bits ±2.5 LSB ±0.5 ...
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... Temperature range ( Version): −40°C to +105°C; typical at +25° specifications tested with the outputs unloaded. 4 Linearity is tested using a reduced code range: AD5304 (Code 8 to Code 248); AD5314 (Code 28 to Code 995); AD5324 (Code 115 to Code 3981). 5 Guaranteed by design and characterization, not production tested. 6 For the amplifier output to reach its minimum voltage, offset error must be negative ...
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... DB0 Figure 2. Serial Interface Timing Diagram Rev Page AD5304/AD5314/AD5324 Test Conditions/Comments SCLK cycle time SCLK high time SCLK low time SYNC to SCLK falling edge setup time Data setup time Data hold time SCLK falling edge to SYNC rising edge ...
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... AD5304/AD5314/AD5324 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 4. 1 Parameter Rating V to GND –0 Digital Input Voltage to GND –0 Reference Input Voltage to GND –0 through GND –0 OUT OUT Operating Temperature Range Industrial ( Version) – ...
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... CONNECTED LEFT UNCONNECTED PROVIDED V D THERE IS A CONNECTION VIA THE GND PIN. OUT th falling edge of SCLK, the rising edge of SYNC acts as an interrupt and the write Rev Page AD5304/AD5314/AD5324 SYNC DD AD5304 SCLK OUT AD5314 AD5324 3 8 DIN ...
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... Rev Page Data Sheet T = 25° 100 150 200 CODE Figure 8. AD5304 Typical DNL Plot T = 25° 200 400 600 800 CODE Figure 9. AD5314 Typical DNL Plot T = 25° ...
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... TEMPERATURE (°C) Figure 12. AD5304 INL Error and DNL Error vs. Temperature 1 REF 0.5 GAIN ERROR 0 OFFSET ERROR –0.5 –1.0 – TEMPERATURE (°C) Figure 13. AD5304 Offset Error and Gain Error vs. Temperature 0.2 0.1 0 –0.1 –0.2 –0.3 –0.4 –0.5 –0 REF ...
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... AD5304/AD5314/AD5324 600 –40°C 500 +25°C 400 +105°C 300 200 100 0 2.5 3.0 3.5 4.0 V (V) DD Figure 17. Supply Current vs. Supply Voltage 0.5 0.4 0.3 0.2 +25°C 0.1 0 2.5 3.0 3.5 4.0 V (V) DD Figure 18. Power-Down Current vs. Supply Voltage 1000 T = 25°C A 900 800 700 600 500 400 0 0.5 1.0 1.5 2.0 2.5 3.0 V (V) LOGIC Figure 19. Supply Current vs. Logic Input Voltage ...
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... FREQUENCY (Hz) Figure 25. Multiplying Bandwidth (Small-Signal Frequency Response 550 600 = 100k 1M 10M Rev Page AD5304/AD5314/AD5324 0. 25°C A 0.01 0 –0.01 –0. (V) REF Figure 26. Full-Scale Error vs. V REF 150ns/DIV Figure 27 ...
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... AD5304/AD5314/AD5324 TERMINOLOGY Relative Accuracy or Integral Nonlinearity (INL) For the DAC, relative accuracy or integral nonlinearity (INL measure of the maximum deviation, in LSB, from a straight line passing through the endpoints of the DAC transfer function. Typical INL vs. code plots can be seen in Figure 5, Figure 6, and Figure 7. ...
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... CODES AMPLIFIER FOOTROOM (1mV) NEGATIVE OFFSET ERROR Figure 28. Transfer Function with Negative Offset GAIN ERROR PLUS OFFSET ERROR OUTPUT VOLTAGE POSITIVE OFFSET Rev Page AD5304/AD5314/AD5324 GAIN ERROR PLUS OFFSET ERROR ACTUAL IDEAL DAC CODE Figure 29. Transfer Function with Positive Offset ...
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... Figure 15. The slew rate is 0.7 V/μs with a half-scale settling time to ±0.5 LSB (at eight bits μs. POWER-ON RESET The AD5304/AD5314/AD5324 are provided with a power-on reset V A function, so that they power defined state. The power-on OUT state uses normal operation and an output voltage set ...
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... DAC registers. The AD5324 uses all 12 bits of DAC data; the AD5314 uses 10 bits and ignores the 2 LSB Bits. The AD5304 uses eight bits and ignores the last four bits. The data format is straight binary, with all 0s corresponding output and all 1s corresponding to full-scale output (V − ...
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... CIRCUITRY Figure 35. Output Stage during Power-Down MICROPROCESSOR INTERFACING AD5304/AD5314/AD5324 to ADSP-21xx Figure 36 shows a serial interface between the AD5304/AD5314/ AD5324 and the ADSP-21xx family. The ADSP-21xx is set up to operate in the SPORT transmit alternate framing mode. The ADSP-21xx sport is programmed through the SPORT control register and must be configured as follows: internal clock operation, active-low framing, and 16-bit word length ...
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... P3.3 is taken high following the completion of this cycle. The 80C51/80L51 outputs the serial data in a format that has the LSB first. The AD5304/ AD5314/AD5324 requires its data with the MSB as the first bit received. The 80C51/80L51 transmit routine takes this into account ...
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... More typically, these devices are used with a fixed, precision reference voltage. Suitable references for 5 V operation are the AD780 and REF192 (2.5 V references). For 2.5 V operation, a suitable external reference would be the AD589, a 1.23 V band gap reference. Figure 40 shows a typical setup for the AD5304/ AD5314/AD5324 when using an external reference 0.1µ ...
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... The serial loading structure of the AD5304/AD5314/AD5324 makes them ideally suited for use in opto-isolated applications. Figure 42 shows an opto-isolated interface to the AD5304 where DIN, SCLK, and SYNC are driven from optocouplers. The power supply to the part also needs to be isolated. This is done by using a transformer. On the DAC side of the transformer regulator provides the 5 V supply required for the AD5304 ...
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... The printed circuit board on which the AD5304/AD5314/AD5324 is mounted is designed so that the analog and digital sections are separated and confined to certain areas of the board. If the AD5304/AD5314/AD5324 are in a system where multiple devices require an AGND-to-DGND connection, the connection is made at one point only. The star ground point is established as close as possible to the device. The AD5304/AD5314/AD5324 has ample supply bypassing of 10 μ ...
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... Rev Page AD5304/AD5314/AD5324 Additional Pin Functions Package GAIN HBEN CLR ✓ ✓ TSSOP ✓ ✓ TSSOP ✓ ✓ TSSOP ✓ ✓ ✓ TSSOP ✓ TSSOP ✓ ✓ ...
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... AD5304/AD5314/AD5324 OUTLINE DIMENSIONS IDENTIFIER PIN 1 INDEX AREA 0.80 0.75 0.70 SEATING PLANE 3.10 3.00 2.90 5. 3.10 4.90 3.00 4.65 1 2.90 5 PIN 1 0.50 BSC 0.95 15° MAX 0.85 1.10 MAX 0.75 0.15 0.23 6° 0.30 0.05 0.13 0° 0.15 COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-187-BA Figure 45. 10-Lead Mini Small Outline Package [MSOP] (RM-10) Dimensions shown in millimeters 3.10 3.00 SQ 2.90 6 0.50 0.40 0.30 5 TOP VIEW BOTTOM VIEW 0.05 MAX 0.02 NOM 0.30 0.20 REF ...
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... AD5304BRM –40°C to +105°C AD5304BRM-REEL –40°C to +105°C AD5304BRM-REEL7 –40°C to +105°C AD5304BRMZ –40°C to +105°C AD5304BRMZ-REEL –40°C to +105°C AD5304BRMZ-REEL7 –40°C to +105°C AD5304BCPZ-REEL7 –40°C to +105°C AD5314ACPZ-REEL7 –40°C to +105°C AD5314ARM – ...
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... AD5304/AD5314/AD5324 NOTES ©2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D00929-0-9/11(H) Rev Page Data Sheet ...