CAT93C57 CATALYST [Catalyst Semiconductor], CAT93C57 Datasheet
CAT93C57
Available stocks
Related parts for CAT93C57
CAT93C57 Summary of contents
Page 1
... ORG GND SK * TDFN 3x3mm (ZD4) and SOIC (W) rotated pin-out packages are available for CAT93C57 and CAT93C56, Rev. E only (not recommended for new designs of CAT93C56) PIN FUNCTION Pin Name Function CS Chip Select SK Clock Input DI Serial Data Input DO ...
Page 2
... CAT93C56, CAT93C57 (1) Absolute Maximum Ratings Parameters Storage Temperature Voltage on Any Pin with Respect to Ground (3) Reliability Characteristics Symbol Parameter (4) NEND Endurance TDR Data Retention D.C. OPERATING CHARACTERISTICS, CAT93C56, Die Rev. G – New Product V = +1.8V to +5.5V, T =-40°C to +85°C unless otherwise specified Symbol ...
Page 3
... V < 5.5V 2.1mA CC OL 4.5V ≤ V < 5.5V -400µ 1.8V ≤ V < 4.5V 1mA CC OL 1.8V ≤ V < 4.5V -100µ Conditions Min OUT CAT93C56, CAT93C57 Min Max Units 3 mA 500 µA 10 µA 10 µA 1 µA 1 µA -0 ...
Page 4
... CAT93C56, CAT93C57 (1) A.C. CHARACTERISTICS , CAT93C56, Die Rev. G – New Product V = +1.8V to +5.5V -40°C to +85°C, unless otherwise specified Symbol Parameter t CS Setup Time CSS t CS Hold Time CSH t DI Setup Time DIS t DI Hold Time DIH t Output Delay to 1 PD1 t Output Delay to 0 ...
Page 5
... Placing the DO pin into the high impedance state is recommended in applications where the DI pin and the DO pin are to be tied together to form a common DI/O pin. t SKLOW t SKHI t DIS VALID t DIS 5 CAT93C56, CAT93C57 Units CSH t DIH t PD0, t PD1 t CSMIN DATA VALID Doc. No. MD-1088 Rev. P ...
Page 6
... CAT93C56, CAT93C57 The format for all instructions sent to the device is a logical “1” start bit, a 2-bit (or 4-bit) opcode, 7-bit address (CAT93C57) / 8-bit address (CAT93C56) (an additional bit when organized X8) and for write INSTRUCTION SET Device Start Instruction Type Bit Opcode (1) READ ...
Page 7
... Data can be read normally from the device regardless of the write enable/disable status. The EWEN and EWDS instructions timing is shown in Figure 3. A N– PD0 Dummy CAT93C56, CAT93C57 enable) instruction. Once the Don't Care Address + 1 Address + 2 Address + ...
Page 8
... CAT93C56, CAT93C57 Write After receiving a WRITE command (Figure 4), address and the data, the CS (Chip Select) pin must be deselected for a minimum of t CSMIN CS will start the self clocking clear and data store cycle of the memory location specified in the instruction. The clocking of the SK pin is not necessary after the device has entered the self clocking mode ...
Page 9
... The ready/busy status of the CAT93C56/57 can be determined by selecting the device and polling the DO pin not necessary for all memory locations to be cleared before the WRAL command is executed CAT93C56, CAT93C57 STATUS VERIFY STANDBY BUSY READY HIGH ...
Page 10
... CAT93C56, CAT93C57 PACKAGE OUTLINE DRAWINGS PDIP 8-Lead 300mils (L) PIN # 1 IDENTIFICATION D TOP VIEW SIDE VIEW For current Tape and Reel information, download the PDF file from: http://www.catsemi.com/documents/tapeandreel.pdf. Notes: (1) All dimensions are in millimeters. (2) Complies with JEDEC MS-001. Doc. No. MD-1088 Rev. P SYMBOL ...
Page 11
... For current Tape and Reel information, download the PDF file from: http://www.catsemi.com/documents/tapeandreel.pdf. Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MS-012. © Catalyst Semiconductor, Inc. Characteristics subject to change without notice SYMBOL θ CAT93C56, CAT93C57 MIN NOM MAX A 1.35 1.75 A1 0.10 0.25 b 0.33 0.51 c 0.19 ...
Page 12
... CAT93C56, CAT93C57 SOIC 8-Lead EIAJ (208mils) (X) PIN#1 IDENTIFICATION TOP VIEW SIDE VIEW For current Tape and Reel information, download the PDF file from: http://www.catsemi.com/documents/tapeandreel.pdf. Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with EIAJ EDR-7320. Doc. No. MD-1088 Rev. P SYMBOL ...
Page 13
... All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MO-153. © Catalyst Semiconductor, Inc. Characteristics subject to change without notice SYMBOL MIN A A1 0.05 A2 0.80 b 0.19 c 0. 6. 0.50 θ1 0° A θ1 L1 END VIEW 13 CAT93C56, CAT93C57 NOM MAX 1.20 0.15 0.90 1.05 0.30 0.20 3.00 3.10 6.40 6.50 4.40 4.50 0.65 BSC 1.00 REF 0.60 0.75 8° Doc. No. MD-1088 Rev. P ...
Page 14
... CAT93C56, CAT93C57 TDFN 8-Pad 2 x 3mm (VP2) D PIN#1 INDEX AREA TOP VIEW SYMBO L MIN NOM A 0.70 0.75 A1 0.00 0.02 A2 0.45 0.55 A3 0.20 REF b 0.20 0.25 D 1.90 2.00 D2 1.30 1.40 E 2.90 3.00 E2 1.20 1.30 e 050 TYP L 0.20 0.30 For current Tape and Reel information, download the PDF file from: http://www.catsemi.com/documents/tapeandreel.pdf. Notes: (1) All dimensions are in millimeters. ...
Page 15
... For current Tape and Reel information, download the PDF file from: http://www.catsemi.com/documents/tapeandreel.pdf. Notes: (1) All dimensions are in millimeters. (2) Complies with JEDEC MO-229. © Catalyst Semiconductor, Inc. Characteristics subject to change without notice SIDE VIEW MAX A 0.80 0.05 A1 0.37 3.10 2.40 3.10 1.60 0.40 15 CAT93C56, CAT93C57 PIN BOTTOM VIEW A3 FRONT VIEW Doc. No. MD-1088 Rev. P ...
Page 16
... CAT93C56, CAT93C57 EXAMPLE OF ORDERING INFORMATION CAT93C56, Die Rev. G, New Product Prefix Device # Suffix CAT 93C56 Company ID L: PDIP V: SOIC, JEDEC Product Number X: SOIC, EIAJ 93C56 Y: TSSOP VP2: TDFN (2x3mm) Notes: (1) All packages are RoHS-compliant (Lead-free, Halogen-free). (2) The standard lead finish is NiPdAu. ...
Page 17
... REVISION HISTORY Date Rev. Comments 05/14/04 L New Data Sheet Created From CAT93C46/56/57/66/86. Parts CAT93C56, CAT93C56, CAT93C57, CAT93C56/57, CAT93C76 and CAT93C86 have been separated into single data sheets 10/13/06 M Updated Instruction Set 03/18/05 N Updated Description 10/13/06 O Update Features Update Pin Configuration Update Functional Symbol Update Pin Functions Update D ...
Page 18
Copyrights, Trademarks and Patents © Catalyst Semiconductor, Inc. Trademarks and registered trademarks of Catalyst Semiconductor include each of the following: Beyond Memory™, DPP™, EZDim™, LDD™, MiniPot™ and Quad-Mode™ Catalyst Semiconductor has been issued U.S. and foreign patents and has patent ...