LTC1865 LINER [Linear Technology], LTC1865 Datasheet

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LTC1865

Manufacturer Part Number
LTC1865
Description
Ultra-Tiny, Differential, 16-Bit ADC with SPI Interface SPI Interface
Manufacturer
LINER [Linear Technology]
Datasheet

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FEATURES
APPLICATIONS
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TYPICAL APPLICATION
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and No
Latency ΔΣ is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Protected by U.S. Patents, including 6208279, 6411242,
7088280, 7164378.
±V
16-Bit Resolution (Including Sign), No Missing
Codes
2LSB Offset Error
4LSB Full-Scale Error
60 Conversions Per Second
Single Conversion Settling Time for Multiplexed
Applications
Single-Cycle Operation with Auto Shutdown
800µA Supply Current
0.2µA Sleep Current
Internal Oscillator—No External Components
Required
SPI Interface
Ultra-Tiny 3mm × 2mm DFN and TSOT-23 Packages
System Monitoring
Environmental Monitoring
Direct Temperature Measurements
Instrumentation
Industrial Process Control
Data Acquisition
Embedded ADC Upgrades
CC
10k
10k
Differential Input Range
10k
R
0.1µF
0.1µF
IN
IN
+
REF
LTC2452
GND
V
CC
2452 TA01a
CS
SCK
SDO
0.1µF
3-WIRE SPI
INTERFACE
10µF
2.7V TO 5.5V
Ultra-Tiny, Differential, 16-Bit
DESCRIPTION
The LTC
analog-to-digital converter. The LTC2452 uses a single
2.7V to 5.5V supply and communicates through an SPI
interface. The ADC is available in an 8-pin, 3mm × 2mm
DFN package or TSOT-23 package. It includes an integrated
oscillator that does not require any external components.
It uses a delta-sigma modulator as a converter core and
has no latency for multiplexed applications. The LTC2452
includes a proprietary input sampling scheme that reduces
the average input sampling current several orders of
magnitude when compared to conventional delta-sigma
converters. Additionally, due to its architecture, there is
negligible current leakage between the input pins.
The LTC2452 can sample at 60 conversions per second,
and due to the very large oversampling ratio, has extremely
relaxed antialiasing requirements. The LTC2452 includes
continuous internal offset and full-scale calibration algo-
rithms which are transparent to the user, ensuring accuracy
over time and over the operating temperature range. The
converter has an external REF pin and the differential input
voltage range can extend up to ±V
Following a single conversion, the LTC2452 can automati-
cally enter a sleep mode and reduce its supply current to
less than 0.2µA. If the user reads the ADC once a second,
the LTC2452 consumes an average of less than 50µW
from a 2.7V supply.
ΔΣ ADC with SPI Interface
®
2452 is an ultra-tiny, fully differential, 16-bit,
–1
–2
–3
3
2
1
0
–3
Integral Nonlinearity, V
T
A
DIFFERENTIAL INPUT VOLTAGE (V)
–2
= –45°C, 25°C, 90°C
–1
0
REF
1
.
CC
LTC2452
2
= 3V
2452 TA01b
3
2452fc
1

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LTC1865 Summary of contents

Page 1

FEATURES ±V Differential Input Range n CC 16-Bit Resolution (Including Sign), No Missing n Codes 2LSB Offset Error n 4LSB Full-Scale Error n 60 Conversions Per Second n Single Conversion Settling Time for Multiplexed n Applications Single-Cycle Operation with Auto ...

Page 2

LTC2452 ABSOLUTE MAXIMUM RATINGS (Notes 1, 2) Supply Voltage (V ) ................................... –0. – Analog Input Voltage ( –0. Reference Voltage (V ) .............. –0. REF ...

Page 3

ANALOG INPUTS AND REFERENCES operating temperature range, otherwise specifications are at T SYMBOL PARAMETER + V Positive Input Voltage Range IN – V Negative Input Voltage Range IN V Reference Voltage Range REF + + Overrange + ...

Page 4

LTC2452 TIMING CHARACTERISTICS range,otherwise specifications are SYMBOL PARAMETER t Conversion Time CONV f SCK Frequency Range SCK t SCK Low Period lSCK t SCK High Period hSCK t CS Falling Edge to SDO Low ...

Page 5

TYPICAL PERFORMANCE CHARACTERISTICS Offset Error vs Temperature REF 0 –1 – 4.1V CC REF REF –3 –4 –5 –50 ...

Page 6

LTC2452 PIN FUNCTIONS SCK (Pin 1): Serial Clock Input. SCK synchronizes the serial data output. While digital data is available (the ADC is not in CONVERT state) and CS is LOW (ADC is not in SLEEP state) a new data ...

Page 7

APPLICATIONS INFORMATION POWER-ON RESET CONVERT SLEEP SCK = LOW NO AND CS = LOW? YES DATA OUTPUT 16TH FALLING NO EDGE OF SCK HIGH? Figure 2. LTC2452 State Transition Diagram started, this operation can not be aborted ...

Page 8

LTC2452 APPLICATIONS INFORMATION The LTC2452 includes a proprietary input sampling scheme that reduces the average input current by several orders of magnitude when compared to traditional delta-sigma architectures. This allows external filter networks to in- terface directly to the LTC2452. ...

Page 9

APPLICATIONS INFORMATION MSB SDO SCK lSCK SDO SCK = HIGH CONVERT During the data output operation the CS input pin must ...

Page 10

LTC2452 APPLICATIONS INFORMATION Serial Interface Operation Modes The modes of operation can be summarized as follows: 1) The LTC2452 functions with SCK idle high (commonly known as CPOL = 1) or idle low (commonly known as CPOL = 0). 2) ...

Page 11

APPLICATIONS INFORMATION CS SD0 SCK CONVERT SLEEP Figure 8. Idle-Low (CPOL = 0) Clock. CS Triggers a New Conversion CS SD0 SCK CONVERT SLEEP Figure 9. Idle-Low (CPOL = 0) Clock. The 16th SCK Falling Edge Triggers a New Conversion ...

Page 12

LTC2452 APPLICATIONS INFORMATION CS SD0 SCK CONVERT Figure 10. Idle-High (CPOL = 1) Clock and Aborted I/O Example CS SD0 SCK CONVERT SLEEP Figure 11. Idle-Low (CPOL = 0) Clock and Aborted I/O Example CS SD0 SCK = LOW CONVERT ...

Page 13

APPLICATIONS INFORMATION sion operation can be triggered by pulling CS low and then high. When CS is pulled low (CS = LOW), SDO will output the sign (D15) of the result of the just completed conversion. While a low logic ...

Page 14

LTC2452 APPLICATIONS INFORMATION PRESERVING THE CONVERTER ACCURACY The LTC2452 is designed to minimize the conversion result’s sensitivity to device decoupling, PCB layout, antialiasing circuits, line and frequency perturbations. Nevertheless, in order to preserve the high accuracy capability of this part, ...

Page 15

APPLICATIONS INFORMATION The LT6660 reference is an ideal match for driving the LTC2452’s REF pin. The LTC6660 is available in a 2mm × 2mm DFN package with 2.5V, 3V, 3.3V and 5V options. A 0.1µF , high quality, ceramic capacitor ...

Page 16

LTC2452 APPLICATIONS INFORMATION Figure 17 shows the measured LTC2452 INL vs Input Voltage as a function of R value with an input capacitor 0.1µ some cases, R can be increased above these guidelines. S ...

Page 17

APPLICATIONS INFORMATION Signal Bandwidth, Transition Noise and Noise Equivalent Input Bandwidth 1 The LTC2452 includes a sinc type digital filter with the first notch located 60Hz. As such, the 3dB input signal 0 bandwidth is 26.54Hz. The ...

Page 18

LTC2452 TYPICAL APPLICATION + V LT6660HCDC GND 1µF GND 2 + REF 0.1µF 1k – IN 0.1µF 18 JP1 +5V EXT OUT 1µF GND 4 1k ...

Page 19

PACKAGE DESCRIPTION 0.61 ±0.05 (2 SIDES) 2.55 ±0.05 1.15 ±0.05 0.25 ± 0.05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS PIN 1 BAR TOP MARK (SEE NOTE 6) 0.200 REF NOTE: 1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE ...

Page 20

LTC2452 PACKAGE DESCRIPTION 0.40 MAX 3.85 MAX 2.62 REF RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR 0.20 BSC DATUM ‘A’ 0.30 – 0.50 REF NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF ...

Page 21

REVISION HISTORY (Revision history begins at Rev C) REV DATE DESCRIPTION C 03/10 Updated Analog Inputs and References section Added text to Input Voltage Range section Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, ...

Page 22

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