LTC3413 LINER [Linear Technology], LTC3413 Datasheet
LTC3413
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LTC3413 Summary of contents
Page 1
... The internal synchronous power switch with 85m on-resistance increases efficiency and eliminates the need for an external Schottky diode. Switching frequencies up to 2MHz are set by an external resistor. Forced-continuous operation in the LTC3413 reduces noise and RF interference. Fault protection is provided by an overcurrent comparator that limits output current dur- TM Memory, ing both sourcing and sinking operations ...
Page 2
... Specifications over the – operating temperature range are assured by design, characterization and correlation with statistical process controls. Note 3: The LTC3413E is tested in a feedback loop that adjusts V achieve a specified error amplifier output voltage (I Note 4: Dynamic supply current is higher due to the internal gate charge being delivered at the switching frequency ...
Page 3
... NFET ON-RESISTANCE 2.5 3 3.5 4 4.5 INPUT VOLTAGE (V) Frequency vs Input Voltage 1050 1040 1030 1020 1010 1000 990 2.5 3 3.5 4 4.5 INPUT VOLTAGE (V) LTC3413 Load Regulation 0 –0.05 –0.10 –0.15 –0.20 –0.25 –0.30 0 0.5 1.0 1.5 5.0 5.5 LOAD CURRENT (A) 3413 G02 Switch Leakage vs Input Voltage 2 2.0 1.5 1.0 NFET 0 ...
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... LTC3413 W U TYPICAL PERFOR A CE CHARACTERISTICS Quiescent Current vs Input Voltage 350 300 250 200 150 100 50 0 2.0 2.5 3.0 3.5 INPUT VOLTAGE (V) Load Step Transient OUTPUT VOLTAGE 100mV/DIV INDUCTOR CURRENT 1A/DIV V = 2.5V 20 s/DIV 1.25V OUT LOAD STEP = 0A TO –3A 4 OUTPUT VOLTAGE ...
Page 5
... REF – 2 PGOOD 2 RUN/SS (Pin 7): Run Control and Soft-Start Input. Forcing this pin below 0.5V shuts down the LTC3413. In shutdown and PV must all functions are disabled drawing < supply current capacitor to ground from this pin sets the ramp time to full output current. ...
Page 6
... TH user should calculate the power dissipation when the pin with a refer- FB LTC3413 is used at 100% duty cycle with low input voltages to ensure that thermal limits are not exceeded. Slope Compensation and Inductor Peak Current Slope compensation provides stability in constant fre- quency architectures by preventing subharmonic oscilla- tions at duty cycles greater than 50% ...
Page 7
... U U APPLICATIO S I FOR ATIO The basic LTC3413 application circuit is shown in Figure 1a. External component selection is determined by the maximum load current and begins with the selection of the inductor value and operating frequency followed by C and C . OUT Operating Frequency Selection of the operating frequency is a tradeoff between efficiency and component size ...
Page 8
... LTC3413 U U APPLICATIO S I FOR ATIO Table 1 shows some recommended surface mount inductors for LTC3413 applications. Table 1. Recommended Surface Mount Inductors Manufacturer Part Number Murata LQH55DNR47M01 Vishay/Dale IHLP2525CZPJR47M01 Pulse P1166.681T Cooper SD20-R47 C and C Selection IN OUT The input capacitance needed to filter the trapezoi- IN dal wave current at the source of the top MOSFET ...
Page 9
... R 1 Soft-Start The RUN/SS pin provides a means to shut down the LTC3413 as well as a timer for soft-start. Pulling the RUN/SS pin below 0.5V places the LTC3413 in a low quiescent current shutdown state (I The LTC3413 contains an internal soft-start clamp that gradually raises the clamp on I ...
Page 10
... J A where example, consider the LTC3413 in dropout at an input voltage of 3.3V, a load current of 3A and an ambient temperature From the Typical Performance graph ESR dissipative of switch resistance, the R OUT approximately 97m . Therefore, power dissi- pated by the part is: ...
Page 11
... V tracking of V and should not be confused with OUT IN poor load regulation Design Example As a design example, consider using the LTC3413 application with the following specifications: V DS(ON 1.25V, I OUT First, calculate the timing resistor: R OSC Use a standard value of 309k ...
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... PC Board Layout Checklist When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3413. Check the following in your layout ground plane is recommended ground plane layer is not used, the signal and power grounds should be ...
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... U U APPLICATIO S I FOR ATIO (4a) Top Layer W U (4c) PCB Photo Figure 4. LTC3413 Layout Diagram LTC3413 (4b) Bottom Layer sn3413 3413fs 13 ...
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... 100k 2 15 PGOOD SW R ITH 5.11k SWV ITH 2200pF 100pF V PGND FB X7R LTC3413 PGND T R OSC 309k REF RUN/ 330pF X7R 8 9 SGND IN2 100 F *VISHAY DALE IHLP-2525CZ-01 0.47 H ...
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... BSC 4. RECOMMENDED MINIMUM PCB METAL SIZE FOR EXPOSED PAD ATTACHMENT MILLIMETERS (INCHES) *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.150mm (.006") PER SIDE LTC3413 4.90 – 5.10* (.193 – .201) 2.74 (.108) 16 1514 2.74 6.40 (.108) ...
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... 100k 2 15 PGOOD SW R ITH 10k SWV ITH 2200pF 100pF V PGND FB X7R LTC3413 PGND T R OSC 309k REF RUN/ 330pF X7R 8 9 SGND IN2 100 F *VISHAY DALE IHLP-2525CZ-01 0.47 H **TDK C4532X5R0J107M † ...