M29W320EB70N6 NUMONYX, M29W320EB70N6 Datasheet

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M29W320EB70N6

Manufacturer Part Number
M29W320EB70N6
Description
IC FLASH 32MBIT 70NS 48TSOP
Manufacturer
NUMONYX
Series
Axcell™r
Datasheet

Specifications of M29W320EB70N6

Format - Memory
FLASH
Memory Type
FLASH - Nor
Memory Size
32M (4Mx8, 2Mx16)
Speed
70ns
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Features
January 2007
32 Mbit (4Mbx8 or 2Mbx16, Uniform Parameter Blocks, Boot Block)
Supply voltage
– V
– V
Access times: 70, 90ns
Programming time
– 10µs per byte/word typical
– Double word/ Quadruple byte Program
Memory Blocks
– Memory Array: 63 Main Blocks
– 8 Parameter Blocks (Top or Bottom
Erase Suspend and Resume modes
– Read and Program another Block during
Unlock Bypass Program command
– Faster Production/Batch Programming
V
Temporary Block Unprotection mode
Common Flash Interface
– 64 bit Security code
Extended memory Block
– Extra block used as security block or to
Low power consumption
– Standby and Automatic Standby
100,000 Program/Erase cycles per block
Electronic signature
– Manufacturer code: 0020h
– Top Device code M29W320ET: 2256h
– Bottom Device code M29W320EB: 2257h
ECOPACK
PP
Read
Location)
Erase Suspend
store additional information
/WP pin for fast Program and Write Protect
CC
PP
=12V for Fast Program (optional)
= 2.7V to 3.6V for Program, Erase and
®
packages available
Rev 5
3V supply Flash memory
TFBGA48 (ZE)
TSOP48 (N)
12 x 20mm
6 x 8mm
M29W320EB
FBGA
M29W320ET
www.st.com
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M29W320EB70N6 Summary of contents

Page 1

... Access times: 70, 90ns Programming time – 10µs per byte/word typical – Double word/ Quadruple byte Program Memory Blocks – Memory Array: 63 Main Blocks – 8 Parameter Blocks (Top or Bottom Location) Erase Suspend and Resume modes – Read and Program another Block during ...

Page 2

Contents Contents 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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... DC and ac parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 8 Package mechanical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 9 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Appendix A Block Addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Appendix B Common Flash Interface (CFI Appendix C Extended memory Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 9.1 Factory Locked Extended Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 9.2 Customer Lockable Extended Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Quadruple byte Program command . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Double word Program command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Contents 3/63 ...

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Contents Appendix D Block Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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M29W320ET, M29W320EB List of tables Table 1. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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List of figures List of figures Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 7

... M29W320ET, M29W320EB 1 Description The M29W320E Mbit (4Mb x8 or 2Mb x16) non-volatile memory that can be read, erased and reprogrammed. These operations can be performed using a single low voltage (2.7 to 3.6V) supply. On power-up the memory defaults to its Read mode. The device features an asymmetrical block architecture. The M29W320E has an array of 8 parameter and 63 main blocks ...

Page 8

Description Figure 1. Logic diagram Table 1. Signal names A0-A20 DQ0-DQ7 DQ8-DQ14 DQ15A– BYTE / 8/ / A0-A20 W M29W320ET E M29W320EB ...

Page 9

M29W320ET, M29W320EB Figure 2. TSOP connections A15 1 A14 A13 A12 A11 A10 A9 A8 A19 M29W320ET A20 M29W320EB /WP RB A18 A17 A16 ...

Page 10

Description Figure 3. TFBGA48 connections (top view through package 10/ A17 A2 A6 A18 A20 ...

Page 11

M29W320ET, M29W320EB Figure 4. Block Addresses (x8) Top Boot Block (x8) Address lines A20-A0, DQ15A-1 000000h 64 KByte or 32 KWord 00FFFFh 2F0000h 64 KByte or 32 KWord 2FFFFFh 300000h 64 KByte or 32 KWord 30FFFFh 3E0000h 64 KByte or ...

Page 12

Description Figure 5. Block Addresses (x16) Top Boot Block (x16) Address lines A20-A0 000000h 64 KByte or 32 KWord 007FFFh 178000h 64 KByte or 32 KWord 17FFFFh 180000h 64 KByte or 32 KWord 187FFFh 1F0000h 64 KByte or 32 KWord ...

Page 13

... Figure 1: Logic connected to this device. 2.1 Address Inputs (A0-A20) The Address Inputs select the cells in the memory array to access during Bus Read operations. During Bus Write operations they control the commands sent to the Command interface of the Program/Erase Controller. 2.2 Data Inputs/Outputs (DQ0-DQ7) The Data I/O outputs the data stored at the selected address during a Bus Read operation ...

Page 14

... Signal descriptions 2.7 Write Enable (W) The Write Enable, W, controls the Bus Write operation of the memory’s Command interface. 2.8 V Write Protect (V PP/ The V /Write Protect pin provides two functions. The V PP use an external high voltage power supply to reduce the time required for Program operations ...

Page 15

... This prevents Bus Write operations from accidentally damaging the data LKO during power up, power down and power surges. If the Program/Erase Controller is programming or erasing during this time then the operation aborts and the memory contents being altered will be invalid. A 0.1µF capacitor should be connected between the V Ground pin to decouple the current surges from the power supply ...

Page 16

... There are five standard bus operations that control the device. These are Bus Read, Bus Write, Output Disable, Standby and Automatic Standby. See Table 2 and on Chip Enable or Write Enable are ignored by the memory and do not affect bus operations. 3.1 Bus Read Bus Read operations read from the memory cells, or specific registers in the Command interface ...

Page 17

... They require V applied to some pins. 3.6.1 Electronic signature The memory has two codes, the manufacturer code and the device code, that can be read to identify the memory. These codes can be read by applying the signals listed in and Table 3, Bus operations ...

Page 18

... Bus operations Table 2. Bus operations, BYTE = V Operation E G Bus Read Bus Write Output Disable X V Standby Read Manufacturer code Read Device code Extended memory Block Verify code 18/63 (1) IL Address Inputs W DQ15A–1, A0-A20 V Cell Address Command Address Others Others V ID ...

Page 19

... M29W320ET, M29W320EB Table 3. Bus operations, BYTE = V Operation E Bus Read Bus Write Output Disable X V Standby V IH Read Manufacturer code Read Device code Extended memory Block Verify code (1) IH Address Inputs G W A0-A20 V Cell Address Command Address Others Others Others Bus operations Data Inputs/Outputs DQ15A– ...

Page 20

... If the Read/Reset command is issued during the time-out of a Block erase operation then the memory will take up to 10µs to abort. During the abort period no valid data can be read from the memory. The Read/Reset command will not abort an Erase operation when issued while in Erase Suspend ...

Page 21

... Status register. A Read/Reset command must be issued to reset the error condition and return to Read mode. Note that the Program command cannot change a bit set at ’0’ back to ’1’. One of the Erase Commands must be used to set all the bits in a block or in the whole memory from ’0’ to ’1’. (CFI), Table ...

Page 22

... Read mode. Note that the Fast Program commands cannot change a bit set at ’0’ back to ’1’. One of the Erase Commands must be used to set all the bits in a block or in the whole memory from ’0’ to ’1’. Typical Program times are given in Endurance cycles 4 ...

Page 23

... Status register on the Data Inputs/Outputs. See the section on the Status register for more details. After the Chip Erase operation has completed the memory will return to the Read mode, unless an error has occurred. When an error occurs the memory will continue to output the /Write Protect pin the memory automatically enters the PP Table 6 ...

Page 24

... Command interface Status register. A Read/Reset command must be issued to reset the error condition and return to Read mode. The Chip Erase Command sets all of the bits in unprotected blocks of the memory to ’1’. All previous data is lost. 4.10 Block Erase command The Block Erase command can be used to erase a list of one or more blocks. It sets all of the bits in the unprotected selected blocks to ’ ...

Page 25

... Extended Block. The Extended Block (with the same address as the boot block) cannot be erased, and can be treated as one-time programmable (OTP) memory. In Extended Block mode the Boot Blocks are not accessible. To exit from the Extended Block mode the Exit Extended Block command must be issued. ...

Page 26

Command interface Table 4. Commands, 16-bit mode, BYTE = V Command Addr Data Addr Data 1 X Read/Reset 3 555 Auto Select 3 555 Program 4 555 Double word Program 3 555 Unlock Bypass 3 555 Unlock Bypass 2 X ...

Page 27

M29W320ET, M29W320EB Table 5. Commands, 8-bit mode, BYTE = V Command Add 1 Read/Reset 3 AAA Auto Select 3 AAA Program 4 AAA Quadruple byte Program 5 AAA Unlock Bypass 3 AAA Unlock Bypass Program 2 Unlock Bypass Reset 2 ...

Page 28

Command interface Table 6. Program, Erase times and Program, Erase Endurance cycles Parameter Chip Erase Block Erase (64 Kbytes) Erase Suspend Latency time Program (byte or word) Double word Program (byte or word) Chip Program (byte by byte) Chip Program ...

Page 29

... DQ7, not its complement. During Erase operations the Data Polling bit outputs ’0’, the complement of the erased state of DQ7. After successful completion of the Erase operation the memory returns to Read mode. In Erase Suspend mode the Data Polling bit will output a ’1’ during a Bus Read operation within a block being erased. The Data Polling bit will change from a ’ ...

Page 30

... Error bit is set to ’1’ when a Program, Block Erase or Chip Erase operation fails to write the correct data to the memory. If the Error bit is set a Read/Reset command must be issued before other commands are issued. The Error bit is output on DQ5 when the Status register is read. Note that the Program command cannot change a bit set to ’ ...

Page 31

M29W320ET, M29W320EB Table 7. Status register bits Operation Program Program during Erase Suspend Program Error Chip Erase Block Erase before timeout Block Erase Erase Suspend Erase Error 1. Unspecified data bits should be ignored. (1) Address DQ7 DQ6 Any Address ...

Page 32

Status register Figure 6. Data Polling flowchart 32/63 M29W320ET, M29W320EB START READ DQ5 & DQ7 at VALID ADDRESS DQ7 YES = DATA NO NO DQ5 = 1 YES READ DQ7 at VALID ADDRESS DQ7 YES = DATA NO FAIL PASS ...

Page 33

M29W320ET, M29W320EB Figure 7. Toggle flowchart Address of Block being Programmed or Erased. START READ DQ6 ADDRESS = BA READ DQ5 & DQ6 ADDRESS = BA DQ6 NO = TOGGLE YES NO DQ5 = 1 YES READ ...

Page 34

Maximum rating 6 Maximum rating Stressing the device above the rating listed in the absolute maximum ratings table may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. These are ...

Page 35

M29W320ET, M29W320EB 7 DC and ac parameters This section summarizes the operating measurement conditions, and the dc and ac characteristics of the device. The parameters in the dc and ac characteristics tables that follow, are derived from tests performed under ...

Page 36

DC and ac parameters Table 10. Device capacitance Symbol C Input capacitance IN C Output capacitance OUT 1. Sampled only, not 100% tested. Table 11. DC characteristics Symbol I Input Leakage current LI I Output Leakage current LO (1) I ...

Page 37

M29W320ET, M29W320EB Figure 10. Read mode ac waveforms A0-A20/ A– DQ0-DQ7/ DQ8-DQ15 BYTE tELBL/tELBH Table 12. Read ac characteristics Symbol Alt t t Address Valid to Next Address Valid AVAV Address Valid to Output Valid ...

Page 38

DC and ac parameters Figure 11. Write ac waveforms, Write Enable controlled A0-A20/ A– DQ0-DQ7/ DQ8-DQ15 V CC tVCHEL RB Table 13. Write ac characteristics, Write Enable controlled Symbol Alt t t Address Valid to Next Address ...

Page 39

M29W320ET, M29W320EB Figure 12. Write ac waveforms, Chip Enable controlled A0-A20/ A– DQ0-DQ7/ DQ8-DQ15 V CC tVCHWL RB Table 14. Write ac characteristics, Chip Enable controlled Symbol Alt t t Address Valid to Next Address Valid AVAV ...

Page 40

DC and ac parameters Figure 13. Toggle and alternative Toggle bits mechanism, Chip Enable controlled A0-A20 VALID ADDRESS E G Data (1) (2) DQ2 /DQ6 1. The Toggle bit is output on DQ6. 2. The alternative Toggle bit is output ...

Page 41

M29W320ET, M29W320EB Figure 15. Reset/Block Temporary Unprotect ac waveforms tPLPX RP Table 16. Reset/Block Temporary Unprotect ac characteristics Symbol Alt (1) t PHWL RP High to Write Enable Low, Chip Enable t t PHEL RH Low, ...

Page 42

Package mechanical 8 Package mechanical Figure 17. TSOP48 Lead Plastic Thin Small Outline, 12x20 mm, top view package outline DIE 1. Drawing not to scale. Table 17. TSOP48 Lead Plastic Thin Small Outline, 12x20 mm, package mechanical ...

Page 43

M29W320ET, M29W320EB Figure 18. TFBGA48 6x8mm - 6x8 Ball Array, 0.8mm Pitch, bottom view package outline FE BALL "A1" Drawing not to scale. Table 18. TFBGA48 6x8mm - 6x8 Ball Array, 0.8mm Pitch, package mechanical data Symbol ...

Page 44

... This product is also available with the Extended Block factory locked. For further details and ordering information contact your nearest ST sales office. Devices are shipped from the factory with the memory content bits erased to ’1’. For a list of available options (Speed, Package, etc.) or for further information on any aspect of this device, please contact the ST Sales Office nearest to you ...

Page 45

M29W320ET, M29W320EB Appendix A Block Addresses Table 20. Top Boot Block Addresses, M29W320ET Block size Block (Kbytes/Kwords) 0 64/32 1 64/32 2 64/32 3 64/32 4 64/32 5 64/32 6 64/32 7 64/32 8 64/32 9 64/32 10 64/32 11 ...

Page 46

Block Addresses Table 20. Top Boot Block Addresses, M29W320ET (continued) Block size Block (Kbytes/Kwords) 28 64/32 29 64/32 30 64/32 31 64/32 32 64/32 33 64/32 34 64/32 35 64/32 36 64/32 37 64/32 38 64/32 39 64/32 40 64/32 ...

Page 47

M29W320ET, M29W320EB Table 20. Top Boot Block Addresses, M29W320ET (continued) Block size Block (Kbytes/Kwords) 60 64/32 61 64/32 62 64/32 63 8/4 64 8/4 65 8/4 66 8/4 67 8/4 68 8/4 69 8/4 70 8/4 1. Used as the ...

Page 48

Block Addresses Table 21. Bottom Boot Block Addresses, M29W320EB (continued) Block size Block (Kbytes/Kwords) 19 64/32 20 64/32 21 64/32 22 64/32 23 64/32 24 64/32 25 64/32 26 64/32 27 64/32 28 64/32 29 64/32 30 64/32 31 64/32 ...

Page 49

M29W320ET, M29W320EB Table 21. Bottom Boot Block Addresses, M29W320EB (continued) Block size Block (Kbytes/Kwords) 51 64/32 52 64/32 53 64/32 54 64/32 55 64/32 56 64/32 57 64/32 58 64/32 59 64/32 60 64/32 61 64/32 62 64/32 63 64/32 ...

Page 50

... Common Flash Interface (CFI) The Common Flash Interface is a JEDEC approved, standardized data structure that can be read from the Flash memory device. It allows a system software to query the device to determine various electrical and timing parameters, density information and functions supported by the memory. The system can interface easily with the device, enabling the software to upgrade itself when necessary ...

Page 51

M29W320ET, M29W320EB Table 24. CFI Query System Interface Information Address Data x16 x8 1Bh 36h 0027h 1Ch 38h 0036h 1Dh 3Ah 00B5h 1Eh 3Ch 00C5h 1Fh 3Eh 0004h 20h 40h 0000h 21h 42h 000Ah 22h 44h 0000h 23h 46h 0004h ...

Page 52

Common Flash Interface (CFI) Table 25. Device Geometry Definition Address Data x16 x8 27h 4Eh 0016h 28h 50h 0002h 29h 52h 0000h 2Ah 54h 0000h 2Bh 56h 0000h 2Ch 58h 0002h 2Dh 5Ah 0007h 2Eh 5Ch 0000h 2Fh 5Eh 0020h ...

Page 53

M29W320ET, M29W320EB Table 26. Primary Algorithm-specific extended Query table (continued) Address Data x16 x8 4Ah 94h 0000h 4Bh 96h 0000h 4Ch 98h 0000h 4Dh 9Ah 00B5h 4Eh 9Ch 00C5h 4Fh 9Eh 000xh Table 27. Security code area Address x16 x8 ...

Page 54

... Bit DQ7 is the most significant bit in the Extended Block Verify code and a specific procedure must be followed to read it. See “Extended memory Block Verify code” in and Section Table 3. on page operations, BYTE = The Extended Block can only be accessed when the device is in Extended Block mode ...

Page 55

... M29W320EB 000010h-00FFFFh 1. See Table 20 and Table 21, Top and Bottom Boot Block Addresses. (1) Address x16 Security identification 1F8000h-1F8007h 1F8008h-1FFFFFh Security identification 000000h-000007h 000008h-007FFFh Extended memory Block Data Factory Locked Customer Lockable Determined by number customer Unavailable Determined by number customer Unavailable 55/63 ...

Page 56

... Block Protection Appendix D Block Protection Block protection can be used to prevent any operation from modifying the data stored in the memory. The blocks are protected in groups, refer to Table 20 and Table Erase operations within the protected group fail to change the data. There are three techniques that can be used to control Block Protection, these are the Programmer technique, the In-system technique and Temporary Unprotection. Temporary Unprotection is controlled by the Reset/Block Temporary Unprotection pin, RP ...

Page 57

M29W320ET, M29W320EB Table 29. Programmer technique Bus operations, BYTE = V Operation E G Block (group ( Protect Chip Unprotect Block (group Protection Verify Block (group ...

Page 58

Block Protection Figure 19. Programmer Equipment Group Protect flowchart 1. Block Protection groups are shown in 58/63 START ADDRESS = GROUP ADDRESS Wait ...

Page 59

M29W320ET, M29W320EB Figure 20. Programmer Equipment Chip Unprotect flowchart NO = 1000 Block Protection groups are shown in START PROTECT ALL GROUPS CURRENT GROUP = 0 A6, ...

Page 60

Block Protection Figure 21. In-system Equipment Group Protect flowchart 1. Block Protection groups are shown can be either when using the In-system technique to protect the Extended Block 60/63 START ...

Page 61

M29W320ET, M29W320EB Figure 22. In-system Equipment Chip Unprotect flowchart ++ 1000 ISSUE READ/RESET COMMAND FAIL 1. Block Protection groups are shown in START PROTECT ALL GROUPS CURRENT GROUP = 0 RP ...

Page 62

Revision history Revision history Table 30. Document revision history Date 15-Apr-2004 18-Nov-2004 14-Mar-2005 28-Mar-2006 16-Jan-2007 62/63 Version 1.0 First Issue. Protection group for Blocks and and Blocks modifed in Table 20: Top Boot Block ...

Page 63

M29W320ET, M29W320EB Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein ...

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