MC10EP01DT ON Semiconductor, MC10EP01DT Datasheet

MC10EP01DT

Manufacturer Part Number
MC10EP01DT
Description
Manufacturer
ON Semiconductor
Datasheet

Specifications of MC10EP01DT

Logic Family
ECL
Logical Function
NOR/OR
Number Of Elements
1
High Level Output Current
-50mA
Low Level Output Current
50mA
Propagation Delay Time
0.35ns
Operating Supply Voltage (typ)
-3.3/-5/3.3/5V
Operating Temp Range
-40C to 85C
Package Type
TSSOP
Number Of Outputs
2
Number Of Inputs
4-IN
Technology
ECL
Mounting
Surface Mount
Pin Count
8
Operating Temperature Classification
Industrial
Operating Supply Voltage (max)
-5.5/5.5V
Operating Supply Voltage (min)
-3/3V
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC10EP01DT
Manufacturer:
ON
Quantity:
1 173
Part Number:
MC10EP01DTR2
Manufacturer:
ON
Quantity:
5 000
MC10EP01, MC100EP01
3.3V / 5V ECL 4-Input
OR/NOR
Description
functionally equivalent to the EL01 device, LVEL01, and E101 (a
quad version). With AC performance much faster than the LVEL01
device, the EP01 is ideal for applications requiring the fastest AC
performance available.
Features
© Semiconductor Components Industries, LLC, 2008
August, 2008 − Rev. 9
The MC10EP01 is a 4−input OR/NOR gate. The device is
The 100 Series contains temperature compensation.
V
V
230 ps Typical Propagation Delay
Maximum Frequency > 3 GHz Typical
PECL Mode Operating Range:
NECL Mode Operating Range:
Open Input Default State
Pb−Free Packages are Available
CC
CC
= 3.0 V to 5.5 V with V
= 0 V with V
EE
= −3.0 V to −5.5 V
EE
= 0 V
1
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
CASE 506AA
MN SUFFIX
CASE 948R
DT SUFFIX
CASE 751
D SUFFIX
H
K
5H
2W = MC100
M
TSSOP−8
*For additional marking information, refer to
8
(Note: Microdot may be in either location)
SOIC−8
Application Note AND8002/D.
DFN8
8
= MC10
= MC100
= MC10
= Date Code
1
ORDERING INFORMATION
1
http://onsemi.com
8
1
8
1
MARKING DIAGRAMS*
ALYWG
HP01
Publication Order Number:
A
L
Y
W
G
HEP01
1
ALYW
G
G
4
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
8
1
MC10EP01/D
8
1
KEP01
ALYW
ALYWG
1
KP01
G
G
4

Related parts for MC10EP01DT

MC10EP01DT Summary of contents

Page 1

MC10EP01, MC100EP01 3.3V / 5V ECL 4-Input OR/NOR Description The MC10EP01 is a 4−input OR/NOR gate. The device is functionally equivalent to the EL01 device, LVEL01, and E101 (a quad version). With AC performance much faster than the LVEL01 device, the ...

Page 2

Figure 1. 8−Lead Pinout (Top View) and Logic Diagram Table 3. ATTRIBUTES Characteristics Internal Input Pulldown Resistor Internal Input Pullup Resistor ESD Protection Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) ...

Page 3

Table 4. MAXIMUM RATINGS Symbol Parameter V PECL Mode Power Supply CC V NECL Mode Power Supply EE V PECL Mode Input Voltage I NECL Mode Input Voltage I Output Current out I V Sink/Source Operating Temperature ...

Page 4

Table 5. 10EP DC CHARACTERISTICS, PECL Symbol Characteristic I Power Supply Current EE V Output HIGH Voltage (Note Output LOW Voltage (Note Input HIGH Voltage (Single−Ended Input LOW Voltage (Single−Ended ...

Page 5

Table 8. 100EP DC CHARACTERISTICS, PECL Symbol Characteristic I Power Supply Current EE V Output HIGH Voltage (Note 10 Output LOW Voltage (Note 10 Input HIGH Voltage (Single−Ended Input LOW Voltage (Single−Ended ...

Page 6

Table 11. AC CHARACTERISTICS V Symbol Characteristic f Maximum Frequency max (See Figure 2. F /JITTER) max t , Propagation Delay PLH t PHL t Cycle−to−Cycle Jitter JITTER (See Figure 2. F /JITTER) max t Output Rise/Fall Times r t ...

Page 7

... ORDERING INFORMATION Device MC10EP01D MC10EP01DG MC10EP01DR2 MC10EP01DR2G MC10EP01DT MC10EP01DTG MC10EP01DTR2 MC10EP01DTR2G MC10EP01MNR4 MC10EP01MNR4G MC100EP01D MC100EP01DG MC100EP01DR2 MC100EP01DR2G MC100EP01DT MC100EP01DTG MC100EP01DTR2 MC100EP01DTR2G MC100EP01MNR4 MC100EP01MNR4G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D ...

Page 8

... G C SEATING PLANE −Z− 0.25 (0.010 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE 0.10 (0.004 SOLDERING FOOTPRINT* 1 ...

Page 9

K 8x REF 0.10 (0.004) 0.15 (0.006 L −U− PIN 1 IDENT 0.15 (0.006 −V− C 0.10 (0.004) D −T− G SEATING PLANE PACKAGE DIMENSIONS TSSOP−8 ...

Page 10

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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