PIC16F616-I/P Microchip Technology, PIC16F616-I/P Datasheet - Page 14

• Manufacturer Part Number: PIC16F616-I/P
• Description: IC PIC MCU FLASH 2KX14 14DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F616-I/P

• Core Size: 8-Bit
• Program Memory Size: 3.5KB (2K x 14)
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Core Processor: PIC
• Speed: 20MHz
• Number Of I /o: 11
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 14-DIP (0.300", 7.62mm)
• Controller Family/series: PIC16F
• No. Of I/o's: 12
• Ram Memory Size: 128Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• Package: 14PDIP
• Device Core: PIC
• Family Name: PIC16
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 11
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 3
• Processor Series: PIC16F
• Core: PIC
• Data Ram Size: 128 B
• Maximum Clock Frequency: 20 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MCP1631RD-DCPC1 - REF DES BATT CHARG OR LED DRIVERAC162083 - HEADER MPLAB ICD2 PIC16F616 8/14AC124001 - MODULE SKT PROMATEII 8DIP/SOIC
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

PIC16F610/616/16HV610/616
2.2
The data memory (see Figure 2-4) is partitioned into
two banks, which contain the General Purpose
Registers (GPR) and the Special Function Registers
(SFR). The Special Function Registers are located in
the
PIC16F610/16HV610 Register locations 40h-7Fh in
Bank 0 are General Purpose Registers, implemented
as
locations 20h-7Fh in Bank 0 and A0h-BFh in Bank 1
are General Purpose Registers, implemented as static
RAM. Register locations F0h-FFh in Bank 1 point to
addresses 70h-7Fh in Bank 0. All other RAM is
unimplemented and returns ‘0’ when read. The RP0 bit
of the STATUS register is the bank select bit.
RP0
DS41288C-page 12
0
1
Note:
static
→
→
first
Data Memory Organization
Bank 0 is selected
Bank 1 is selected
The IRP and RP1 bits of the STATUS
register are reserved and should always be
maintained as ‘0’s.
RAM.
32
locations
PIC16F616/16HV616
of
each
Register
bank.
Preliminary
2.2.1
The register file is organized as 64 x 8 in the
PIC16F610/16HV610
PIC16F616/16HV616. Each register is accessed,
either directly or indirectly, through the File Select Reg-
ister (FSR) (see Section 2.4 “Indirect Addressing,
INDF and FSR Registers”).
2.2.2
The Special Function Registers are registers used by
the CPU and peripheral functions for controlling the
desired operation of the device (see Table 2-1). These
registers are static RAM.
The special registers can be classified into two sets:
core and peripheral. The Special Function Registers
associated with the “core” are described in this section.
Those related to the operation of the peripheral features
are described in the section of that peripheral feature.
GENERAL PURPOSE REGISTER
FILE
SPECIAL FUNCTION REGISTERS
© 2007 Microchip Technology Inc.
and
128 x 8
in
the