PIC12F635-I/P Microchip Technology, PIC12F635-I/P Datasheet - Page 81

• Manufacturer Part Number: PIC12F635-I/P
• Description: IC MCU FLASH 1KX14 8DIP
• Manufacturer: Microchip Technology
• Series: PIC® 12Fr

Specifications of PIC12F635-I/P

• Program Memory Type: FLASH
• Program Memory Size: 1.75KB (1K x 14)
• Package / Case: 8-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 5
• Eeprom Size: 128 x 8
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC12F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 64 B
• Interface Type: RS- 232/SPI/USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 2
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164120, DM163029, DV164101, DM163014
• Minimum Operating Temperature: - 40 C
• Data Rom Size: 128 B
• Height: 3.3 mm
• Length: 9.27 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2 V
• Width: 6.35 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM163029 - BOARD PICDEM FOR MECHATRONICSAC162057 - MPLAB ICD 2 HEADER 14DIPACICE0201 - MPLABICE 8P 300 MIL ADAPTERAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

11.0
The PIC16F639 device consists of the PIC16F636
device and low frequency (LF) Analog Front-End
(AFE), with the AFE section containing three analog-
input channels for signal detection and LF talk-back.
This section describes the Analog Front-End (AFE) in
detail.
The PIC16F639 device can detect a 125 kHz input
signal as low as 1 mVpp and transmit data by using
internal LF talk-back modulation or via an external
transmitter. The PIC16F639 can also be used for
various
Figure 11-3 and Figure 11-4 show application examples
of the device.
Each analog input channel has internal tuning
capacitance, sensitivity control circuits, an input signal
strength limiter and an LF talk-back modulation
transistor. An Automatic Gain Control (AGC) loop is
used for all three input channel gains. The output of
each channel is OR'd and fed into a demodulator. The
digital output is passed to the LFDATA pin. Figure 11-1
shows the block diagram of the AFE and Figure 11-2
shows the LC input path.
There are a total of eight Configuration registers. Six of
them are used for AFE operation options, one for
column parity bits and one for status indication of AFE
operation. Each register has 9 bits including one row
parity bit. These registers are readable and writable by
SPI (Serial Protocol Interface) commands except for
the Status register, which is read-only.
11.1
The RF Limiter limits LC pin input voltage by de-Q’ing
the attached LC resonant circuit. The absolute voltage
limit is defined by the silicon process’s maximum
allowed input voltage (see Section 15.0 “Electrical
Specifications”). The limiter begins de-Q’ing the
external LC antenna when the input voltage exceeds
V
antenna input voltage.
The signal levels from all 3 channels are combined
such that the limiter attenuates all 3 channels
uniformly, in respect to the channel with the strongest
signal.
© 2005 Microchip Technology Inc.
DE
_
Q
, progressively de-Q’ing harder to reduce the
ANALOG FRONT-END (AFE)
FUNCTIONAL DESCRIPTION
(PIC16F639 ONLY)
RF Limiter
bidirectional
communication
applications.
PIC12F635/PIC16F636/639
Preliminary
11.2
The modulation circuit consists of a modulation
transistor (FET), internal tuning capacitors and external
LC antenna components. The modulation transistor
and the internal tuning capacitors are connected
between the LC input pin and LCCOM pin. Each LC
input has its own modulation transistor.
When the modulation transistor turns on, its low Turn-on
Resistance (R
voltage. The coil voltage is minimized when the
modulation transistor turns-on and maximized when the
modulation
transistor’s low Turn-on Resistance (R
high modulation depth.
The LF talk-back is achieved by turning on and off the
modulation transistor.
The modulation data comes from the microcontroller
section via the digital SPI interface as “Clamp On”,
“Clamp Off” commands. Only those inputs that are
enabled will execute the clamp command. A basic
block diagram of the modulation circuit is shown in
Figure 11-1 and Figure 11-2.
The modulation FET is also shorted momentarily after
Soft Reset and Inactivity timer time-out.
11.3
Each channel has internal tuning capacitors for external
antenna tuning. The capacitor values are programmed
by the Configuration registers up to 63 pF, 1 pF per step.
11.4
The variable attenuator is used to attenuate, via AGC
control, the input signal voltage to avoid saturating the
amplifiers and demodulators.
11.5
The sensitivity of each channel can be reduced by the
channel’s Configuration register sensitivity setting.
This is used to desensitize the channel from optimum.
Note:
Note:
Note:
Modulation Circuit
Tuning Capacitor
Variable Attenuator
Sensitivity Control
The user can control the tuning capacitor
by programming the AFE Configuration
registers.
The
accomplished by the device itself. The
user cannot control its function.
The user can desensitize the channel
sensitivity by programming the AFE
Configuration registers.
transistor
M
) clamps the induced LC antenna
variable
turns-off.
attenuator
DS41232B-page 79
The
M
) results in a
function
modulation
is