PIC12F635-I/P Microchip Technology, PIC12F635-I/P Datasheet - Page 82

• Manufacturer Part Number: PIC12F635-I/P
• Description: IC MCU FLASH 1KX14 8DIP
• Manufacturer: Microchip Technology
• Series: PIC® 12Fr

Specifications of PIC12F635-I/P

• Program Memory Type: FLASH
• Program Memory Size: 1.75KB (1K x 14)
• Package / Case: 8-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 5
• Eeprom Size: 128 x 8
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC12F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 64 B
• Interface Type: RS- 232/SPI/USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 2
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164120, DM163029, DV164101, DM163014
• Minimum Operating Temperature: - 40 C
• Data Rom Size: 128 B
• Height: 3.3 mm
• Length: 9.27 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2 V
• Width: 6.35 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM163029 - BOARD PICDEM FOR MECHATRONICSAC162057 - MPLAB ICD 2 HEADER 14DIPACICE0201 - MPLABICE 8P 300 MIL ADAPTERAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC12F635/PIC16F636/639
11.6
The AGC controls the variable attenuator to limit the
internal signal voltage to avoid saturation of internal
amplifiers and demodulators (Refer to Section 11.4
“Variable Attenuator”).
The signal levels from all 3 channels are combined
such that AGC attenuates all 3 channels uniformly in
respect to the channel with the strongest signal.
11.7
FGA1 and FGA2 provides a maximum two-stage gain
of 40 dB.
11.8
The Auto Channel Selection feature is enabled if the
Auto Channel Select bit AUTOCHSEL<8> in Configu-
ration Register 5 (Register 11-6) is set, and disabled if
the bit is cleared. When this feature is active (i.e.,
AUTOCHSE <8> = 1), the control circuit checks the
demodulator output of each input channel immediately
after the AGC settling time (T
it allows this channel to pass data, otherwise it is
blocked.
The status of this operation is monitored by AFE Status
Register 7 bits <8:6> (Register 11-8). These bits indicate
the current status of the channel selection activity, and
automatically updates for every Soft Reset period. The
auto channel selection function resets after each Soft
Reset (or after Inactivity timer time-out). Therefore, the
blocked channels are reenabled after Soft Reset.
This feature can make the output signal cleaner by
blocking any channel that was not high at the end of
T
output, and is not applied for carrier clock or RSSI
output.
11.9
The Detector senses the input carrier cycles. The
output of the Detector switches digitally at the signal
carrier frequency. Carrier clock output is available
when the output is selected by the DATOUT bit in the
AFE Configuration Register 1 (Register 11-2).
DS41232B-page 80
AGC
Note:
Note:
. This function works only for demodulated data
AGC Control
Fixed Gain Amplifiers 1 and 2
Auto Channel Selection
Carrier Clock Detector
The AGC control function is accomplished
by the device itself. The user cannot
control its function.
The user cannot control the gain of these
two amplifiers.
STAB
). If the output is high,
Preliminary
11.10 Demodulator
The Demodulator consists of a full-wave rectifier, low
pass filter, peak detector and Data Slicer that detects
the envelope of the input signal.
11.11 Data Slicer
The Data Slicer consists of a reference generator and
comparator. The Data Slicer compares the input with
the reference voltage. The reference voltage comes
from the minimum modulation depth requirement
setting and input peak voltage. The data from all 3
channels are OR’d together and sent to the output
enable filter.
11.12 Output Enable Filter
The Output Enable Filter enables the LFDATA output
once the incoming signal meets the wake-up sequence
requirements
Output Enable Filter”).
11.13 RSSI (Received Signal Strength
The RSSI provides a current which is proportional to the
input signal amplitude (see Section 11.31.3 “Received
Signal Strength Indicator (RSSI) Output”).
11.14 Analog Front-End Timers
The AFE has an internal 32 kHz RC oscillator. The
oscillator is used in several timers:
• Inactivity timer
• Alarm timer
• Pulse Width timer
• Period timer
• AGC settling timer
11.14.1
The RC oscillator is low power, 32 kHz ± 10% over
temperature and voltage variations.
Indicator)
RC OSCILLATOR
(see
Section 11.15
© 2005 Microchip Technology Inc.
“Configurable