ATTINY13A-SSH Atmel, ATTINY13A-SSH Datasheet - Page 169

• Manufacturer Part Number: ATTINY13A-SSH
• Description: IC MCU AVR 1K FLASH 20MHZ 8SOIC
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY13A-SSH

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 6
• Program Memory Size: 1KB (512 x 16)
• Program Memory Type: FLASH
• Eeprom Size: 64 x 8
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Processor Series: ATTINY1x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 64 B
• Interface Type: SPI
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAKSTK511
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 4-ch x 10-bit
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

25. Datasheet Revision History
25.1
25.2
25.3
25.4
25.5
8126E–AVR–07/10
Rev. 8126E – 07/10
Rev. 8126D – 11/09
Rev. 8126C – 09/09
Rev. 8126B – 11/08
Rev. 8126A – 05/08
Please note that page numbers in this section refer to the current version of this document and
may not apply to previous versions.
1. Updated description in
2. Adjusted notes in
3. Updated plot order in
4. Updated
5. Updated bit syntax throughout the datasheet, e.g. from CS02:0 to CS0[2:0].
1. Added note “If the RSTDISPL fuse is programmed...” in Startup-up Times
2. Added addresses in all Register Description tables and cross-references to Register
3. Updated naming convention for -COM bits in tables from
4. Updated value for
5. Added NiPdAU note for -SH and -SSH in
1. Added EEPROM errata for rev. G - H on
2. Added a note about topside marking in
1. Updated order codes on
2. Updated sections:
3. Updated
1. Initial revision, created from document 2535I – 04/08.
2. Updated characteristic plots of section
3. Updated
4. Updated section:
5. Update tables:
plots, also some headers and figure titles adjusted.
part numbers, as well tape & reel part numbers. Notes adjusted.
and
Summary.
Table 11-7 on page
Flash or EEPROM Location,” on page
162.
–
–
–
–
–
“DIDR0 – Digital Input Disable Register 0” on page 81
“DIDR0 – Digital Input Disable Register 0” on page 95
“Speed” on page 118
“DC Characteristics, TA = -40°C to +85°C” on page 117
“Calibration Accuracy of Internal RC Oscillator” on page 119
Table 6-6 on page
Section 22. “Ordering Information” on page
“Register Summary” on page
“Ordering Information” on page
Table 18-1, “DC Characteristics, TA = -40°C to +85°C,” on page
t
WD_ERASE
72.
Section 19. “Typical Characteristics” on page
Section 6.4.2 “CLKPR – Clock Prescale Register” on page
26.
page 162
in
Table 17-8, “Minimum Wait Delay Before Writing the Next
to reflect changes in material composition.
108.
158.
“Typical Characteristics”
Section 22. “Ordering Information” on page
page
162.
Section 22. “Ordering Information” on page
168.
162, added extended temperature
Table 11-2 on page 70
, starting on page 124.
124, added some
Table 6-5
to
28.
117.
162.
169