ATTINY45V-10MU Atmel, ATTINY45V-10MU Datasheet - Page 142

IC AVR MCU FLASH 4K 10MHZ 20MLF

ATTINY45V-10MU

Manufacturer Part Number
ATTINY45V-10MU
Description
IC AVR MCU FLASH 4K 10MHZ 20MLF
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheets

Specifications of ATTINY45V-10MU

Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
6
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-MLF®, QFN
Processor Series
ATTINY4x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
USI
Maximum Clock Frequency
10 MHz
Number Of Programmable I/os
6
Number Of Timers
2
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
Package
20MLF EP
Device Core
AVR
Family Name
ATtiny
Maximum Speed
10 MHz
For Use With
ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIPATAVRBC100 - REF DESIGN KIT BATTERY CHARGER770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY45V-10MU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
17.13.5
142
ATtiny25/45/85
DIDR0 – Digital Input Disable Register 0
are supported and the voltage on the positive input must always be larger than the voltage on
the negative input. Otherwise the result is saturated to the voltage reference. In the bipolar mode
two-sided conversions are supported and the result is represented in the two’s complement
form. In the unipolar mode the resolution is 10 bits and the bipolar mode the resolution is 9 bits +
1 sign bit.
• Bit 5 – IPR: Input Polarity Reversal
The Input Polarity mode allows software selectable differential input pairs and full 10 bit ADC
resolution, in the unipolar input mode, assuming a pre-determined input polarity. If the input
polarity is not known it is actually possible to determine the polarity first by using the bipolar input
mode (with 9 bit resolution + 1 sign bit ADC measurement). And once determined, set or clear
the polarity reversal bit, as needed, for a succeeding 10 bit unipolar measurement.
• Bits 4:3 – Res: Reserved Bits
These bits are reserved bits in the ATtiny25/45/85 and will always read as zero.
• Bits 2:0 – ADTS[2:0]: ADC Auto Trigger Source
If ADATE in ADCSRA is written to one, the value of these bits selects which source will trigger
an ADC conversion. If ADATE is cleared, the ADTS[2:0] settings will have no effect. A conver-
sion will be triggered by the rising edge of the selected Interrupt Flag. Note that switching from a
trigger source that is cleared to a trigger source that is set, will generate a positive edge on the
trigger signal. If ADEN in ADCSRA is set, this will start a conversion. Switching to Free Running
mode (ADTS[2:0]=0) will not cause a trigger event, even if the ADC Interrupt Flag is set
Table 17-6.
• Bits 5:2 – ADC3D:ADC0D: ADC[3:0] Digital Input Disable
When this bit is written logic one, the digital input buffer on the corresponding ADC pin is dis-
abled. The corresponding PIN register bit will always read as zero when this bit is set. When an
analog signal is applied to the ADC[3:0] pin and the digital input from this pin is not needed, this
bit should be written logic one to reduce power consumption in the digital input buffer.
Bit
0x14
Read/Write
Initial Value
ADTS2
0
0
0
0
1
1
1
ADC Auto Trigger Source Selections
R
7
0
ADTS1
R
6
0
0
0
1
1
0
0
1
ADC0D
R/W
5
0
ADC2D
R/W
ADTS0
4
0
0
1
0
1
0
1
0
ADC3D
R/W
3
0
Trigger Source
Free Running mode
Analog Comparator
External Interrupt Request 0
Timer/Counter0 Compare Match A
Timer/Counter0 Overflow
Timer/Counter0 Compare Match B
Pin Change Interrupt Request
ADC1D
R/W
2
0
AIN1D
R/W
1
0
AIN0D
R/W
0
0
2586M–AVR–07/10
.
DIDR0

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