PIC16F685-I/P Microchip Technology, PIC16F685-I/P Datasheet - Page 149

• Manufacturer Part Number: PIC16F685-I/P
• Description: IC PIC MCU FLASH 4KX14 20DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F685-I/P

• Program Memory Type: FLASH
• Program Memory Size: 7KB (4K x 14)
• Package / Case: 20-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 18
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C/SPI/SSP/EUSART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163029, DV164120
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162061 - HEADER INTRFC MPLAB ICD2 20PINAC164039 - MODULE SKT PROMATE II 20DIP/SOICDM163029 - BOARD PICDEM FOR MECHATRONICSACICE0203 - MPLABICE 20P 300 MIL ADAPTER
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

11.4.7.1
The STRSYNC bit of the PSTRCON register gives the
user two selections of when the steering event will
happen. When the STRSYNC bit is ‘0’, the steering
event will happen at the end of the instruction that
writes to the PSTRCON register. In this case, the
output signal at the P1<D:A> pins may be an
incomplete PWM waveform. This operation is useful
when the user firmware needs to immediately remove
a PWM signal from the pin.
When the STRSYNC bit is ‘1’, the effective steering
update will happen at the beginning of the next PWM
period. In this case, steering on/off the PWM output will
always produce a complete PWM waveform.
FIGURE 11-19:
FIGURE 11-20:
© 2006 Microchip Technology Inc.
P1<D:A>
P1<D:A>
STRn
PWM
STRn
PWM
Steering Synchronization
PORT Data
EXAMPLE OF STEERING EVENT AT END OF INSTRUCTION (STRSYNC = 0)
EXAMPLE OF STEERING EVENT AT BEGINNING OF INSTRUCTION
(STRSYNC = 1)
PWM Period
PORT Data
PIC16F631/677/685/687/689/690
Preliminary
P1n = PWM
Figures 11-19 and 11-20 illustrate the timing diagrams
of the PWM steering depending on the STRSYNC
setting.
P1n = PWM
PORT Data
PORT Data
DS41262C-page 147