PIC16F689-I/SO Microchip Technology, PIC16F689-I/SO Datasheet - Page 209
![IC PIC MCU FLASH 4KX14 20SOIC](/photos/6/64/66480/150-20-soic_sml.jpg)
PIC16F689-I/SO
Manufacturer Part Number
PIC16F689-I/SO
Description
IC PIC MCU FLASH 4KX14 20SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F690DM-PCTLHS.pdf
(306 pages)
3.PIC16F677-IP.pdf
(2 pages)
4.PIC16F677-IP.pdf
(16 pages)
5.PIC16F677-ISO.pdf
(294 pages)
Specifications of PIC16F689-I/SO
Program Memory Type
FLASH
Program Memory Size
7KB (4K x 14)
Package / Case
20-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
18
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C/SPI/SSP/EUSART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
17
Number Of Timers
2
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163029, DM164120
Minimum Operating Temperature
- 40 C
On-chip Adc
12-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT20SO1-1 - SOCKET TRANS ICE 20DIP TO 20SOICXLT28SO-1 - SOCKET TRANSITION 28SOIC 300MILXLT18SO-1 - SOCKET TRANSITION 18SOIC 300MILAC162061 - HEADER INTRFC MPLAB ICD2 20PINAC164039 - MODULE SKT PROMATE II 20DIP/SOIC
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F690DM-PCTLHS PDF datasheet #2
- PIC16F677-IP PDF datasheet #3
- PIC16F677-IP PDF datasheet #4
- PIC16F677-ISO PDF datasheet #5
- Current page: 209 of 294
- Download datasheet (6Mb)
14.4
During an interrupt, only the return PC value is saved
on the stack. Typically, users may wish to save key
registers during an interrupt (e.g., W and STATUS
registers). This must be implemented in software.
Since the upper 16 bytes of all GPR banks are common
in
Figures 2-2 and 2-3), temporary holding registers,
W_TEMP and STATUS_TEMP, should be placed in
here. These 16 locations do not require banking and
therefore, make it easier to context save and restore.
The same code shown in Example 14-1 can be used
to:
• Store the W register
• Store the STATUS register
• Execute the ISR code
• Restore the Status (and Bank Select Bit register)
• Restore the W register
EXAMPLE 14-1:
© 2006 Microchip Technology Inc.
Note:
the
MOVWF W_TEMP
SWAPF STATUS,W
CLRF
MOVWF STATUS_TEMP
:
:(ISR)
:
SWAPF STATUS_TEMP,W
MOVWF STATUS
SWAPF W_TEMP,F
SWAPF W_TEMP,W
Context Saving During Interrupts
The
normally does not require saving the
PCLATH. However, if computed GOTO’s
are used in the ISR and the main code, the
PCLATH must be saved and restored in
the ISR.
PIC16F631/677/685/687/689/690
STATUS
PIC16F631/677/685/687/689/690
SAVING STATUS AND W REGISTERS IN RAM
PIC16F631/677/685/687/689/690
;
;
;
;
;Insert user code here
;
;(sets bank to original state)
;
;
;
Copy W to TEMP register
Swap status to be saved into W
bank 0, regardless of current bank, Clears IRP,RP1,RP0
Save status to bank zero STATUS_TEMP register
Swap STATUS_TEMP register into W
Move W into STATUS register
Swap W_TEMP
Swap W_TEMP into W
(see
Preliminary
DS41262C-page 207
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