PIC16F689-I/SO Microchip Technology, PIC16F689-I/SO Datasheet - Page 72
PIC16F689-I/SO
Manufacturer Part Number
PIC16F689-I/SO
Description
IC PIC MCU FLASH 4KX14 20SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F690DM-PCTLHS.pdf
(306 pages)
3.PIC16F677-IP.pdf
(2 pages)
4.PIC16F677-IP.pdf
(16 pages)
5.PIC16F677-ISO.pdf
(294 pages)
Specifications of PIC16F689-I/SO
Program Memory Type
FLASH
Program Memory Size
7KB (4K x 14)
Package / Case
20-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
18
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C/SPI/SSP/EUSART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
17
Number Of Timers
2
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163029, DM164120
Minimum Operating Temperature
- 40 C
On-chip Adc
12-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT20SO1-1 - SOCKET TRANS ICE 20DIP TO 20SOICXLT28SO-1 - SOCKET TRANSITION 28SOIC 300MILXLT18SO-1 - SOCKET TRANSITION 18SOIC 300MILAC162061 - HEADER INTRFC MPLAB ICD2 20PINAC164039 - MODULE SKT PROMATE II 20DIP/SOIC
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F690DM-PCTLHS PDF datasheet #2
- PIC16F677-IP PDF datasheet #3
- PIC16F677-IP PDF datasheet #4
- PIC16F677-ISO PDF datasheet #5
- Current page: 72 of 294
- Download datasheet (6Mb)
PIC16F631/677/685/687/689/690
REGISTER 4-8:
REGISTER 4-9:
REGISTER 4-10:
DS41262C-page 70
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-4
bit 3-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-4
bit 3-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-4
bit 3-0
Note 1: Global RABPU bit of the OPTION register must be enabled for individual pull-ups to be enabled.
TRISB7
WPUB7
IOCB7
R/W-1
R/W-1
R/W-0
2: The weak pull-up device is automatically disabled if the pin is in Output mode (TRISB<7:4> = 0).
TRISB<7:4>: PORTB Tri-State Control bit
1 = PORTB pin configured as an input (tri-stated)
0 = PORTB pin configured as an output
Unimplemented: Read as ‘0’
WPUB<7:4>: Weak Pull-up Register bit
1 = Pull-up enabled
0 = Pull-up disabled
Unimplemented: Read as ‘0’
IOCB<7:4>: Interrupt-on-Change PORTB Control bit
1 = Interrupt-on-change enabled
0 = Interrupt-on-change disabled
Unimplemented: Read as ‘0’
WPUB6
TRISB6
IOCB6
R/W-1
R/W-1
R/W-0
TRISB: PORTB TRI-STATE REGISTER
WPUB: WEAK PULL-UP PORTB REGISTER
IOCB: INTERRUPT-ON-CHANGE PORTB REGISTER
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
TRISB5
WPUB5
IOCB5
R/W-1
R/W-1
R/W-0
TRISB4
WPUB4
IOCB4
R/W-1
R/W-1
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
U = Unimplemented bit, read as ‘0’
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
‘0’ = Bit is cleared
‘0’ = Bit is cleared
U-0
U-0
U-0
—
—
—
U-0
U-0
U-0
—
—
—
© 2006 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
x = Bit is unknown
U-0
U-0
U-0
—
—
—
U-0
U-0
U-0
—
—
—
bit 0
bit 0
bit 0
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