PIC16F1936-I/MV Microchip Technology, PIC16F1936-I/MV Datasheet - Page 271
![IC MCU 8BIT 14KB FLASH 28UQFN](/photos/12/13/121305/c04-152_mv_sml.jpg)
PIC16F1936-I/MV
Manufacturer Part Number
PIC16F1936-I/MV
Description
IC MCU 8BIT 14KB FLASH 28UQFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheets
1.PIC16F722-ISS.pdf
(8 pages)
2.PIC16LF1933-ISS.pdf
(508 pages)
3.PIC16LF1933-ISS.pdf
(46 pages)
4.PIC16F1936-ISS.pdf
(12 pages)
Specifications of PIC16F1936-I/MV
Core Size
8-Bit
Program Memory Size
14KB (8K x 14)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-UFQFN Exposed Pad
Controller Family/series
PIC16F
No. Of I/o's
25
Eeprom Memory Size
256Byte
Ram Memory Size
512Byte
Cpu Speed
32MHz
No. Of Timers
5
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
MI2C, SPI, EUSART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
25
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
On-chip Dac
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F722-ISS PDF datasheet
- PIC16LF1933-ISS PDF datasheet #2
- PIC16LF1933-ISS PDF datasheet #3
- PIC16F1936-ISS PDF datasheet #4
- Current page: 271 of 508
- Download datasheet (5Mb)
23.6.5
A Repeated Start condition occurs when the RSEN bit
of the SSPCON2 register is programmed high and the
Master state machine is no longer active. When the
RSEN bit is set, the SCL pin is asserted low. When the
SCL pin is sampled low, the Baud Rate Generator is
loaded and begins counting. The SDA pin is released
(brought high) for one Baud Rate Generator count
(T
SDA is sampled high, the SCL pin will be deasserted
(brought high). When SCL is sampled high, the Baud
Rate Generator is reloaded and begins counting. SDA
and SCL must be sampled high for one T
action is then followed by assertion of the SDA pin
(SDA = 0) for one T
asserted low. Following this, the RSEN bit of the
FIGURE 23-27:
2009 Microchip Technology Inc.
BRG
). When the Baud Rate Generator times out, if
I
START CONDITION TIMING
2
C MASTER MODE REPEATED
BRG
REPEAT START CONDITION WAVEFORM
SDA
SCL
while SCL is high. SCL is
Write to SSPCON2
occurs here
SDA = 1,
SCL (no change)
BRG
. This
Preliminary
T
BRG
SDA = 1,
SCL = 1
T
BRG
Repeated Start
SSPCON2 register will be automatically cleared and
the Baud Rate Generator will not be reloaded, leaving
the SDA pin held low. As soon as a Start condition is
detected on the SDA and SCL pins, the S bit of the
SSPSTAT register will be set. The SSPIF bit will not be
set until the Baud Rate Generator has timed out.
PIC16F193X/LF193X
Sr
Note 1: If RSEN is programmed while any other
T
BRG
2: A bus collision during the Repeated Start
S bit set by hardware
At completion of Start bit,
hardware clears RSEN bit
Write to SSPBUF occurs here
event is in progress, it will not take effect.
condition occurs if:
and sets SSPIF
• SDA is sampled low when SCL
• SCL goes low before SDA is
T
BRG
goes from low-to-high.
asserted low. This may indicate that
another master is attempting to
transmit a data ‘1’.
1st bit
T
BRG
DS41364D-page 271
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