ATTINY44A-PU Atmel, ATTINY44A-PU Datasheet - Page 141
![IC MCU AVR 4K FLASH 20MHZ 14PDIP](/photos/7/39/73953/313-14-dip_sml.jpg)
ATTINY44A-PU
Manufacturer Part Number
ATTINY44A-PU
Description
IC MCU AVR 4K FLASH 20MHZ 14PDIP
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY44A-PU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
12
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
14-DIP (0.300", 7.62mm)
Processor Series
ATTINY4x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SPI/USI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
20-ch x 10-bit
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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8183C–AVR–03/11
Figure 16-9.
Figure 16-10. Gain Error
Figure 16-11. Integral Non-linearity (INL)
• Offset: The deviation of the first transition (0x000 to 0x001) compared to the ideal transition
• Gain Error: After adjusting for offset, the Gain Error is found as the deviation of the last
• Integral Non-linearity (INL): After adjusting for offset and gain error, the INL is the maximum
• Differential Non-linearity (DNL): The maximum deviation of the actual code width (the interval
(at 0.5 LSB). Ideal value: 0 LSB.
transition (0x3FE to 0x3FF) compared to the ideal transition (at 1.5 LSB below maximum).
Ideal value: 0 LSB
deviation of an actual transition compared to an ideal transition for any code. Ideal value: 0
LSB.
between two adjacent transitions) from the ideal code width (1 LSB). Ideal value: 0 LSB.
Offset Error
Output Code
Output Code
Output Code
Offset
Error
Gain
Error
V
V
V
REF
REF
REF
ATtiny24A/44A/84A
Input Voltage
Input Voltage
Input Voltage
Ideal ADC
Actual ADC
Ideal ADC
Actual ADC
Ideal ADC
Actual ADC
141
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