PIC12C671-04/SM Microchip Technology, PIC12C671-04/SM Datasheet - Page 346

• Manufacturer Part Number: PIC12C671-04/SM
• Description: IC MCU OTP 1KX14 A/D 8-SOIJ
• Manufacturer: Microchip Technology
• Series: PIC® 12Cr

Specifications of PIC12C671-04/SM

• Core Size: 8-Bit
• Program Memory Size: 1.75KB (1K x 14)
• Core Processor: PIC
• Speed: 4MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• Controller Family/series: PIC12
• No. Of I/o's: 6
• Ram Memory Size: 128Byte
• Cpu Speed: 4MHz
• No. Of Timers: 1
• Digital Ic Case Style: SOIC
• Processor Series: PIC12C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Maximum Clock Frequency: 4 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 1
• Operating Supply Voltage: 3 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000
• Minimum Operating Temperature: 0 C
• On-chip Adc: 8 bit, 4 Channel
• Package: 8SOIJ
• Device Core: PIC
• Family Name: PIC12
• Maximum Speed: 4 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164312 - MODULE SKT FOR PM3 16SOICISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1048 - ADAPTER 8-SOIC TO 8-DIP309-1047 - ADAPTER 8-SOIC TO 8-DIPAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

PICmicro MID-RANGE MCU FAMILY
Figure 18-3:
Table 18-6: Registers Associated with Asynchronous Transmission
DS31018A-page 18-10
PIR
RCSTA
TXREG
PIE
TXSTA
SPBRG Baud Rate Generator Register
Legend: x = unknown, - = unimplemented locations read as '0'.
Note 1: The position of this bit is device dependent.
Name
TXIF bit
(interrupt reg. flag)
TRMT bit
(Transmit shift
reg. empty flag)
Write to TXREG
BRG output
(shift clock)
TX/CK pin
Shaded cells are not used for Asynchronous Transmission.
CSRC
SPEN
Bit 7
TX7
Asynchronous Master Transmission (Back to Back)
Note: This timing diagram shows two consecutive transmissions.
Bit 6
RX9
TX6
TX9
Transmit Shift Reg.
WORD 1
Word 1
SREN
TXEN
Bit 5
TX5
Start Bit
Word 2
CREN
SYNC
Bit 4
TX4
TXIE
TXIF
Bit 0
(1)
Bit 3
(1)
TX3
—
—
Bit 1
BRGH
FERR
WORD 1
Bit 2
TX2
OERR
TRMT
Bit 1
TX1
Bit 7/8
RX9D
TX9D
Bit 0
TX0
WORD 2
Transmit Shift Reg.
Stop Bit
1997 Microchip Technology Inc.
0000 -00x
0000 0000
0000 -010
0000 0000
Value on:
POR,
BOR
0
0
Start Bit
WORD 2
0000 -00x
0000 0000
0000 -010
0000 0000
Value on
all other
Resets
0
0
Bit 0