ATMEGA48V-10MU Atmel, ATMEGA48V-10MU Datasheet - Page 78

IC AVR MCU 4K 10MHZ 1.8V 32-QFN

ATMEGA48V-10MU

Manufacturer Part Number
ATMEGA48V-10MU
Description
IC AVR MCU 4K 10MHZ 1.8V 32-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA48V-10MU

Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Package
32MLF EP
Device Core
AVR
Family Name
ATmega
Maximum Speed
10 MHz
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
23
Interface Type
SPI/TWI/USART
On-chip Adc
8-chx10-bit
Number Of Timers
3
Processor Series
ATMEGA48x
Core
AVR8
Data Ram Size
512 B
Maximum Clock Frequency
10 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
Controller Family/series
AVR MEGA
No. Of I/o's
23
Eeprom Memory Size
256Byte
Ram Memory Size
512Byte
Cpu Speed
10MHz
No. Of Timers
3
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
TOSC1: Timer Oscillator pin 1. Used only if internal calibrated RC Oscillator is selected as chip
clock source, and the asynchronous timer is enabled by the correct setting in ASSR. When the
AS2 bit in ASSR is set (one) to enable asynchronous clocking of Timer/Counter2, pin PB6 is dis-
connected from the port, and becomes the input of the inverting Oscillator amplifier. In this
mode, a crystal Oscillator is connected to this pin, and the pin can not be used as an I/O pin.
PCINT6: Pin Change Interrupt source 6. The PB6 pin can serve as an external interrupt source.
If PB6 is used as a clock pin, DDB6, PORTB6 and PINB6 will all read 0.
• SCK/PCINT5 – Port B, Bit 5
SCK: Master Clock output, Slave Clock input pin for SPI channel. When the SPI is enabled as a
Slave, this pin is configured as an input regardless of the setting of DDB5. When the SPI is
enabled as a Master, the data direction of this pin is controlled by DDB5. When the pin is forced
by the SPI to be an input, the pull-up can still be controlled by the PORTB5 bit.
PCINT5: Pin Change Interrupt source 5. The PB5 pin can serve as an external interrupt source.
• MISO/PCINT4 – Port B, Bit 4
MISO: Master Data input, Slave Data output pin for SPI channel. When the SPI is enabled as a
Master, this pin is configured as an input regardless of the setting of DDB4. When the SPI is
enabled as a Slave, the data direction of this pin is controlled by DDB4. When the pin is forced
by the SPI to be an input, the pull-up can still be controlled by the PORTB4 bit.
PCINT4: Pin Change Interrupt source 4. The PB4 pin can serve as an external interrupt source.
• MOSI/OC2/PCINT3 – Port B, Bit 3
MOSI: SPI Master Data output, Slave Data input for SPI channel. When the SPI is enabled as a
Slave, this pin is configured as an input regardless of the setting of DDB3. When the SPI is
enabled as a Master, the data direction of this pin is controlled by DDB3. When the pin is forced
by the SPI to be an input, the pull-up can still be controlled by the PORTB3 bit.
OC2, Output Compare Match Output: The PB3 pin can serve as an external output for the
Timer/Counter2 Compare Match. The PB3 pin has to be configured as an output (DDB3 set
(one)) to serve this function. The OC2 pin is also the output pin for the PWM mode timer
function.
PCINT3: Pin Change Interrupt source 3. The PB3 pin can serve as an external interrupt source.
• SS/OC1B/PCINT2 – Port B, Bit 2
SS: Slave Select input. When the SPI is enabled as a Slave, this pin is configured as an input
regardless of the setting of DDB2. As a Slave, the SPI is activated when this pin is driven low.
When the SPI is enabled as a Master, the data direction of this pin is controlled by DDB2. When
the pin is forced by the SPI to be an input, the pull-up can still be controlled by the PORTB2 bit.
OC1B, Output Compare Match output: The PB2 pin can serve as an external output for the
Timer/Counter1 Compare Match B. The PB2 pin has to be configured as an output (DDB2 set
(one)) to serve this function. The OC1B pin is also the output pin for the PWM mode timer
function.
PCINT2: Pin Change Interrupt source 2. The PB2 pin can serve as an external interrupt source.
• OC1A/PCINT1 – Port B, Bit 1
ATmega48/88/168
78
2545S–AVR–07/10

Related parts for ATMEGA48V-10MU