PIC16F724-I/ML Microchip Technology, PIC16F724-I/ML Datasheet - Page 180

• Manufacturer Part Number: PIC16F724-I/ML
• Description: IC PIC MCU FLASH 4KX14 44-QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F724-I/ML

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Oscillator Type: Internal
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Type: FLASH
• Ram Size: 192 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 14x8b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Controller Family/series: PIC16F
• No. Of I/o's: 36
• Ram Memory Size: 192Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• No. Of Pwm: RoHS Compliant
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 192 B
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 14 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN444-1001 - DEMO BOARD FOR PICMICRO MCU
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC16F72X/PIC16LF72X
17.2.5
When the R/W bit of the received address byte is clear,
the master will write data to the slave. If an address
match occurs, the received address is loaded into the
SSPBUF register. An address byte overflow will occur
if that loaded address is not read from the SSPBUF
before the next complete byte is received.
An SSP interrupt is generated for each data transfer byte.
The BF, R/W and D/A bits of the SSPSTAT register are
used to determine the status of the last received byte.
FIGURE 17-10:
DS41341E-page 180
SDA
SCL
SSPIF
BF
SSPOV
S
RECEPTION
A7 A6 A5 A4 A3 A2 A1
1
2
Receiving Address
3
I
4
2
C™ WAVEFORMS FOR RECEPTION (7-BIT ADDRESS)
5
6
7
R/W = 0
8
ACK
9
D7
1
D6
2
SSPBUF register is read
Receiving Data
D5
3
Cleared in software
D4
Bit SSPOV is set because the SSPBUF register is still full.
4
D3
5
D2
6
D1
7
D0
8
ACK
9
D7
1
D6
2
D5
Receiving Data
3
D4
4
© 2009 Microchip Technology Inc.
ACK is not sent.
D3
5
D2
6
D1
7
D0
8
ACK
9
condition
Bus Master
sends Stop
P