PIC18LF14K50-I/SS Microchip Technology, PIC18LF14K50-I/SS Datasheet - Page 406

• Manufacturer Part Number: PIC18LF14K50-I/SS
• Description: IC PIC MCU FLASH 16K 1.8V 20SSOP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18LF14K50-I/SS

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 14
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SSOP
• Controller Family/series: PIC18
• No. Of I/o's: 15
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 768Byte
• Cpu Speed: 48MHz
• No. Of Timers: 4
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: EUSART, I2C, MSSP, SPI, USB
• Maximum Clock Frequency: 32 KHz
• Number Of Programmable I/os: 18
• Number Of Timers: 4
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM164127, DV164126
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Package: 20SSOP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 48 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18F1XK50/PIC18LF1XK50
Power Managed Modes ................................................... 231
Power-on Reset (POR) .................................................... 273
Power-up Timer (PWRT)
Precision Internal Oscillator Parameters .......................... 377
Prescaler, Timer0 ............................................................... 99
PRI_IDLE Mode ............................................................... 234
PRI_RUN Mode ............................................................... 232
Program Counter ................................................................ 26
Program Memory
Program Verification and Code Protection ....................... 298
Programming, Device Instructions ................................... 303
PSTRCON Register ......................................................... 129
Pulse Steering .................................................................. 129
PUSH ............................................................................... 332
PUSH and POP Instructions .............................................. 27
PUSHL ............................................................................. 348
PWM (ECCP Module)
PWM Mode. See Enhanced Capture/Compare/PWM ..... 117
PWM1CON Register ........................................................ 128
DS41350C-page 404
LATC Register ........................................................... 90
PORTC Register ........................................................ 90
RC3/SCK/SCL Pin ................................................... 149
Specifications ........................................................... 377
TRISC Register .......................................................... 90
and A/D Operation ................................................... 209
and PWM Operation ................................................ 132
and SPI Operation ................................................... 143
Entering .................................................................... 231
Exiting Idle and Sleep Modes .................................. 235
Idle Modes ............................................................... 233
Multiple Sleep Functions .......................................... 232
Run Modes ............................................................... 232
Selecting .................................................................. 231
Sleep Mode .............................................................. 233
Summary (table) ...................................................... 231
Power-up Timer (PWRT) ......................................... 275
Time-out Sequence .................................................. 275
Specifications ........................................................... 379
PCL, PCH and PCU Registers ................................... 26
PCLATH and PCLATU Registers .............................. 26
and Extended Instruction Set ..................................... 46
Code Protection ....................................................... 299
Instructions ................................................................. 30
Interrupt Vector .......................................................... 25
Look-up Tables .......................................................... 28
Map and Stack (diagram) ........................................... 25
Reset Vector .............................................................. 25
Associated Registers ............................................... 298
Effects of a Reset ..................................................... 132
Operation in Power Managed Modes ...................... 132
Operation with Fail-Safe Clock Monitor ................... 132
Pulse Steering .......................................................... 129
Steering Synchronization ......................................... 131
by Interrupt ....................................................... 235
by Reset ........................................................... 236
by WDT Time-out ............................................. 235
Without a Start-up Delay .................................. 236
PRI_IDLE ......................................................... 234
RC_IDLE .......................................................... 235
SEC_IDLE ........................................................ 234
PRI_RUN ......................................................... 232
RC_RUN .......................................................... 232
SEC_RUN ........................................................ 232
Two-Word .......................................................... 30
Preliminary
R
RAM. See Data Memory.
RC_IDLE Mode ................................................................ 235
RC_RUN Mode ................................................................ 232
RCALL ............................................................................. 333
RCON Register .......................................................... 74, 272
RCREG ............................................................................ 184
RCSTA Register .............................................................. 187
Reader Response ............................................................ 410
RECON0 (Reference Control 0) Register ........................ 243
RECON1 (Reference Control 1) Register ........................ 243
RECON2 (Reference Control 2) Register ........................ 244
Register
Register File ....................................................................... 35
Register File Summary ...................................................... 37
Registers
Bit Status During Initialization .................................. 278
RCREG Register ..................................................... 193
ADCON0 (ADC Control 0) ....................................... 211
ADCON1 (ADC Control 1) ............................... 212, 213
ADRESH (ADC Result High) with ADFM = 0) ......... 214
ADRESH (ADC Result High) with ADFM = 1) ......... 214
ADRESL (ADC Result Low) with ADFM = 0) ........... 214
ADRESL (ADC Result Low) with ADFM = 1) ........... 214
ANSEL (Analog Select 1) .......................................... 94
ANSEL (PORT Analog Control) ................................. 94
ANSELH (Analog Select 2) ........................................ 95
ANSELH (PORT Analog Control) .............................. 95
BAUDCON (EUSART Baud Rate Control) .............. 188
BDnSTAT (Buffer Descriptor n Status, CPU Mode) 255
BDnSTAT (Buffer Descriptor n Status, SIE Mode) .. 256
CCP1CON (Enhanced Capture/Compare/PWM
CM1CON0 (C1 Control) ........................................... 225
CM2CON0 (C2 Control) ........................................... 226
CM2CON1 (C2 Control) ........................................... 229
CONFIG1H (Configuration 1 High) .................. 287, 288
CONFIG1L (Configuration 1 Low) ........................... 287
CONFIG2H (Configuration 2 High) .......................... 290
CONFIG2L (Configuration 2 Low) ........................... 289
CONFIG3H (Configuration 3 High) .......................... 291
CONFIG4L (Configuration 4 Low) ........................... 291
CONFIG5H (Configuration 5 High) .......................... 292
CONFIG5L (Configuration 5 Low) ........................... 292
CONFIG6H (Configuration 6 High) .......................... 293
CONFIG6L (Configuration 6 Low) ........................... 293
CONFIG7H (Configuration 7 High) .......................... 294
CONFIG7L (Configuration 7 Low) ........................... 294
DEVID1 (Device ID 1) .............................................. 295
DEVID2 (Device ID 2) .............................................. 295
ECCPAS (Enhanced CCP Auto-shutdown Control) 125
EECON1 (Data EEPROM Control 1) ................... 49, 58
INTCON (Interrupt Control) ........................................ 65
INTCON2 (Interrupt Control 2) ................................... 66
INTCON3 (Interrupt Control 3) ................................... 67
IOCA (Interrupt-on-Change PORTA) ......................... 82
IOCB (Interrupt-on-Change PORTB) ......................... 87
IPR1 (Peripheral Interrupt Priority 1) ......................... 72
IPR2 (Peripheral Interrupt Priority 2) ......................... 73
LATA (PORTA Data Latch) ........................................ 82
LATB (PORTB Data Latch) ........................................ 87
LATC (PORTC Data Latch) ....................................... 91
OSCCON (Oscillator Control) .............................. 16, 17
OSCTUNE (Oscillator Tuning) ................................... 18
PIE1 (Peripheral Interrupt Enable 1) .......................... 70
Control) ............................................................ 113
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