PIC18LF14K50-I/SS Microchip Technology, PIC18LF14K50-I/SS Datasheet - Page 409

• Manufacturer Part Number: PIC18LF14K50-I/SS
• Description: IC PIC MCU FLASH 16K 1.8V 20SSOP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18LF14K50-I/SS

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 14
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SSOP
• Controller Family/series: PIC18
• No. Of I/o's: 15
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 768Byte
• Cpu Speed: 48MHz
• No. Of Timers: 4
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: EUSART, I2C, MSSP, SPI, USB
• Maximum Clock Frequency: 32 KHz
• Number Of Programmable I/os: 18
• Number Of Timers: 4
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM164127, DV164126
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Package: 20SSOP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 48 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Timing Diagrams and Specifications
Timing Parameter Symbology .......................................... 372
Timing Requirements
Top-of-Stack Access .......................................................... 26
TRISA Register .................................................................. 81
TRISB Register ............................................................ 86, 90
TSTFSZ ........................................................................... 343
Two-Speed Start-up ......................................................... 285
Two-Word Instructions
TXREG ............................................................................. 179
TXSTA Register ............................................................... 186
U
Universal Serial Bus
© 2009 Microchip Technology Inc.
Transition for Wake from Sleep (HSPLL) ................. 233
Transition Timing for Entry to Idle Mode .................. 234
Transition Timing for Wake from Idle to Run Mode . 234
USART Synchronous Receive (Master/Slave) ........ 384
USART Synchronous Transmission (Master/Slave) 384
A/D Conversion Requirements ................................ 382
PLL Clock ................................................................. 376
I
I2C Bus Start/Stop Bits ............................................ 388
SPI Mode ................................................................. 387
Example Cases .......................................................... 30
BRGH Bit ................................................................. 189
Address Register (UADDR) ..................................... 252
Associated Registers ............................................... 268
Buffer Descriptor Table ............................................ 253
Buffer Descriptors .................................................... 253
Class Specifications and Drivers ............................. 270
Descriptors ............................................................... 270
Endpoint Control ...................................................... 251
Enumeration ............................................................. 270
External Pull-up Resistors ........................................ 249
Eye Pattern Test Enable .......................................... 249
Firmware and Drivers ............................................... 268
Frame Number Registers ......................................... 252
Frames ..................................................................... 269
Internal Pull-up Resistors ......................................... 249
Internal Transceiver ................................................. 247
Interrupts .................................................................. 259
Layered Framework ................................................. 269
Oscillator Requirements ........................................... 268
Overview .......................................................... 245, 269
Ping-Pong Buffer Configuration ............................... 249
Power ....................................................................... 269
Power Modes ........................................................... 265
RAM ......................................................................... 252
Speed ....................................................................... 270
2
C Bus Data ............................................................ 389
Address Validation ........................................... 256
Assignment in Different Buffering Modes ........ 258
BDnSTAT Register (CPU Mode) ..................... 254
BDnSTAT Register (SIE Mode) ....................... 256
Byte Count ....................................................... 256
Example ........................................................... 253
Memory Map .................................................... 257
Ownership ........................................................ 253
Ping-Pong Buffering ......................................... 257
Register Summary ........................................... 258
Status and Configuration ................................. 253
and USB Transactions ..................................... 259
Bus Power Only ............................................... 265
Dual Power with Self-Power Dominance ......... 266
Self-Power Only ............................................... 265
Memory Map .................................................... 252
PIC18F1XK50/PIC18LF1XK50
Preliminary
USART
USB Module Electrical Specifications .............................. 370
USB RAM
USB. See Universal Serial Bus.
V
Voltage Reference (VR)
Voltage Reference. See Comparator Voltage
Voltage References
V
W
Wake-up on Break ........................................................... 194
Watchdog Timer (WDT) ........................................... 285, 296
WCOL ...................................................... 165, 166, 167, 170
WCOL Status Flag ................................... 165, 166, 167, 170
WDTCON Register .......................................................... 297
WPUA Register .................................................................. 82
WPUB Register .................................................................. 87
WWW Address ................................................................ 409
WWW, On-Line Support ...................................................... 4
X
XORLW ........................................................................... 343
XORWF ........................................................................... 344
REF
Status and Control ................................................... 246
Transfer Types ........................................................ 269
UFRMH:UFRML Registers ...................................... 252
Synchronous Master Mode
Serial Interface Engine (SIE) ..................................... 31
Specifications .......................................................... 383
Reference (CV
Fixed Voltage Reference (FVR) .............................. 241
VR Stabilization ....................................................... 241
. S
Associated Registers ............................................... 297
Control Register ....................................................... 297
Programming Considerations .................................. 296
Specifications .......................................................... 379
EE
Requirements, Synchronous Receive ............. 384
Requirements, Synchronous Transmission ..... 384
Timing Diagram, Synchronous Receive .......... 384
Timing Diagram, Synchronous Transmission .. 384
ADC Reference Voltage
REF
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DS41350C-page 407