PIC16LF1939-I/P Microchip Technology, PIC16LF1939-I/P Datasheet - Page 270
PIC16LF1939-I/P
Manufacturer Part Number
PIC16LF1939-I/P
Description
IC MCU 8BIT FLASH 40-DIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Specifications of PIC16LF1939-I/P
Core Size
8-Bit
Program Memory Size
28KB (16K x 14)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
36
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Controller Family/series
PIC16LF
Eeprom Memory Size
256Byte
Ram Memory Size
1024Byte
Cpu Speed
32MHz
No. Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PIC16F193X/LF193X
23.6.4
To initiate a Start condition, the user sets the Start
Enable bit, SEN bit of the SSPCON2 register. If the
SDA and SCL pins are sampled high, the Baud Rate
Generator
SSPADD<7:0> and starts its count. If SCL and SDA
are both sampled high when the Baud Rate Generator
times out (T
of the SDA being driven low while SCL is high is the
Start condition and causes the S bit of the SSPSTAT1
register to be set. Following this, the Baud Rate Gen-
erator is reloaded with the contents of SSPADD<7:0>
and resumes its count. When the Baud Rate Genera-
tor times out (T
FIGURE 23-26:
DS41364D-page 270
I
CONDITION TIMING
BRG
2
is
C MASTER MODE START
BRG
), the SDA pin is driven low. The action
reloaded
), the SEN bit of the SSPCON2 reg-
FIRST START BIT TIMING
Write to SEN bit occurs here
with
SDA
SCL
the
contents
SDA = 1,
SCL = 1
T
BRG
Preliminary
of
S
Set S bit (SSPSTAT<3>)
T
BRG
At completion of Start bit,
hardware clears SEN bit
ister will be automatically cleared by hardware; the
Baud Rate Generator is suspended, leaving the SDA
line held low and the Start condition is complete.
and sets SSPIF bit
Note 1: If at the beginning of the Start condition,
Write to SSPBUF occurs here
T
BRG
2: The Philips I
1st bit
the SDA and SCL pins are already sam-
pled low, or if during the Start condition,
the SCL line is sampled low before the
SDA line is driven low, a bus collision
occurs, the Bus Collision Interrupt Flag,
BCLIF, is set, the Start condition is aborted
and the I
state.
bus collision cannot occur on a Start.
T
BRG
2
C module is reset into its Idle
2009 Microchip Technology Inc.
2
C Specification states that a
2nd bit
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