PIC16LF1939-I/P Microchip Technology, PIC16LF1939-I/P Datasheet - Page 75

• Manufacturer Part Number: PIC16LF1939-I/P
• Description: IC MCU 8BIT FLASH 40-DIP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16LF1939-I/P

• Core Size: 8-Bit
• Program Memory Size: 28KB (16K x 14)
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Controller Family/series: PIC16LF
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 1024Byte
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

5.2.2.6
The Internal Oscillator Block can be used with the 4X
PLL associated with the External Oscillator Block to
produce a 32 MHz internal system clock source. The
following settings are required to use the 32 MHz inter-
nal clock source:
• The FOSC bits in Configuration Word 1 must be
• The IRCF bits in the OSCCON register must be
• The SPLLEN bit in the OSCCON register must be
 2009 Microchip Technology Inc.
set to use the INTOSC source as the device sys-
tem clock (FOSC<2:0> = 100).
set to the 8 MHz HFINTOSC selection
(IRCF<3:0> = 1110).
set to enable the 4X PLL.
Note:
The 4X PLL may also be enabled for use
with the Internal Oscillator Block by
programming
Configuration Word 2 to a ‘1’. However,
the 4X PLL cannot be disabled by
software and the 8 MHz HFINTOSC
option will no longer be available.
32 MHz Internal Oscillator
Frequency Selection
the
PLLEN
bit
Preliminary
in
5.2.2.7
When switching between the HFINTOSC, MFINTOSC
and the LFINTOSC, the new oscillator may already be
shut down to save power (see Figure 5-7). If this is the
case, there is a delay after the IRCF<3:0> bits of the
OSCCON register are modified before the frequency
selection takes place. The OSCSTAT register will
reflect the current active status of the HFINTOSC,
MFINTOSC and LFINTOSC oscillators. The sequence
of a frequency selection is as follows:
1.
2.
3.
4.
5.
6.
7.
See Figure 5-7 for more details.
If the internal oscillator speed is switched between two
clocks of the same source, there is no start-up delay
before the new frequency is selected. Clock switching
time delays are shown in Table 5-1.
Start-up delay specifications are located in the
oscillator
Specifications”.
PIC16F193X/LF193X
IRCF<3:0> bits of the OSCCON register are
modified.
If the new clock is shut down, a clock start-up
delay is started.
Clock switch circuitry waits for a falling edge of
the current clock.
The current clock is held low and the clock
switch circuitry waits for a rising edge in the new
clock.
The new clock is now active.
The OSCSTAT register is updated as required.
Clock switch is complete.
tables
Internal Oscillator Clock Switch
Timing
of
Section 29.0
DS41364D-page 75
“Electrical