PIC16LF72-I/SP Microchip Technology, PIC16LF72-I/SP Datasheet - Page 107

• Manufacturer Part Number: PIC16LF72-I/SP
• Description: IC PIC MCU FLASH 2KX14 28DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16LF72-I/SP

• Core Size: 8-Bit
• Program Memory Size: 3.5KB (2K x 14)
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: I²C, SPI
• Number Of I /o: 22
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 5x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Controller Family/series: PIC16LF
• No. Of I/o's: 22
• Ram Memory Size: 128Byte
• Cpu Speed: 16MHz
• No. Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

FIGURE 14-16:
TABLE 14-10: A/D CONVERSION REQUIREMENTS
 2002 Microchip Technology Inc.
Note 1: ADRES register may be read on the following T
Param
No.
130
131
132
134
*
† Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only
A/D DATA
Note 1: If the A/D clock source is selected as RC, a time of T
SAMPLE
A/D CLK
ADRES
T
T
T
T
Sym
BSF ADCON0, GO
AD
CNV
ACQ
GO
These parameters are characterized but not tested.
and are not tested.
ADIF
GO
Q4
A/D Clock Period
Conversion Time (not including S/H time)
(Note 1)
Acquisition Time
Q4 to A/D Clock Start
SLEEP instruction to be executed.
134
132
A/D CONVERSION TIMING
Characteristic
(T
OSC
/2)
7
(1)
PIC16F72
PIC16LF72
PIC16F72
PIC16LF72
6
OLD_DATA
5
SAMPLING STOPPED
CY
4
cycle.
Min
131
130
1.6
2.0
2.0
3.0
5*
—
9
CY
3
is added before the A/D clock starts. This allows the
T
Typ† Max Units
OSC
4.0
6.0
—
—
—
—
/2 —
2
6.0
9.0
—
—
—
9
1
T
µs
µs
µs
µs
µs
—
AD
1 T
0
T
T
2.0V ≤ V
A/D RC mode
A/D RC mode
The minimum time is the
amplifier settling time. This
may be used if the “new”
input voltage has not
changed by more than 1 LSb
(i.e., 20.0 mV @ 5.12V) from
the last sampled voltage (as
stated on C
If the A/D clock source is
selected as RC, a time of T
is added before the A/D
clock starts. This allows the
SLEEP instruction to be
executed.
CY
OSC
OSC
PIC16F72
based, V
based,
NEW_DATA
DONE
Conditions
REF
DS39597B-page 105
HOLD
≤ 5.5V
REF
).
≥ 3.0V
CY