PIC18LF14K50-I/P Microchip Technology, PIC18LF14K50-I/P Datasheet - Page 414
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PIC18LF14K50-I/P
Manufacturer Part Number
PIC18LF14K50-I/P
Description
IC PIC MCU FLASH 16KX10 20-PDIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18F13K50-ISS.pdf
(420 pages)
2.PIC18F13K50-ISS.pdf
(40 pages)
3.PIC18F13K50-ISS.pdf
(10 pages)
4.PIC18F13K50-ISS.pdf
(2 pages)
5.PIC18F14K50-IP.pdf
(422 pages)
Specifications of PIC18LF14K50-I/P
Program Memory Type
FLASH
Program Memory Size
16KB (8K x 16)
Package / Case
20-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
14
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
EUSART/I2C/MSSP/SPI/USB
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
15
Number Of Timers
4
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM164127, DV164126
Minimum Operating Temperature
- 40 C
On-chip Adc
11-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18LF14K50-I/P
Manufacturer:
Microchip
Quantity:
450
PIC18F/LF1XK50
Power-on Reset (POR) .................................................... 281
Power-up Timer (PWRT)
Precision Internal Oscillator Parameters .......................... 385
Prescaler, Timer0 ............................................................. 103
PRI_IDLE Mode ............................................................... 240
PRI_RUN Mode ............................................................... 238
Program Counter ................................................................ 30
Program Memory
Program Verification and Code Protection ....................... 305
Programming, Device Instructions ................................... 311
PSTRCON Register ......................................................... 134
Pulse Steering .................................................................. 134
PUSH ............................................................................... 340
PUSH and POP Instructions .............................................. 31
PUSHL ............................................................................. 356
PWM (ECCP Module)
PWM Mode. See Enhanced Capture/Compare/PWM ..... 121
PWM1CON Register ........................................................ 133
R
RAM. See Data Memory.
RC_IDLE Mode ................................................................ 241
RC_RUN Mode ................................................................ 238
RCALL .............................................................................. 341
RCON Register .......................................................... 78, 280
RCREG ............................................................................ 190
RCSTA Register ............................................................... 193
DS41350D-page 414
and SPI Operation ................................................... 147
Entering .................................................................... 237
Exiting Idle and Sleep Modes .................................. 241
Idle Modes ............................................................... 239
Multiple Sleep Functions .......................................... 238
Run Modes ............................................................... 238
Selecting .................................................................. 237
Sleep Mode .............................................................. 239
Summary (table) ...................................................... 237
Power-up Timer (PWRT) ......................................... 283
Time-out Sequence .................................................. 283
Specifications ........................................................... 387
PCL, PCH and PCU Registers ................................... 30
PCLATH and PCLATU Registers .............................. 30
and Extended Instruction Set ..................................... 50
Code Protection ....................................................... 307
Instructions ................................................................. 34
Interrupt Vector .......................................................... 29
Look-up Tables .......................................................... 32
Map and Stack (diagram) ........................................... 29
Reset Vector .............................................................. 29
Associated Registers ............................................... 307
Effects of a Reset ..................................................... 137
Operation in Power Managed Modes ...................... 137
Operation with Fail-Safe Clock Monitor ................... 137
Pulse Steering .......................................................... 134
Steering Synchronization ......................................... 136
Bit Status During Initialization .................................. 286
by Interrupt ....................................................... 241
by Reset ........................................................... 242
by WDT Time-out ............................................. 241
Without a Start-up Delay .................................. 242
PRI_IDLE ......................................................... 240
RC_IDLE .......................................................... 241
SEC_IDLE ........................................................ 240
PRI_RUN ......................................................... 238
RC_RUN .......................................................... 238
SEC_RUN ........................................................ 238
Two-Word .......................................................... 34
Preliminary
Reader Response ............................................................ 420
RECON0 (Reference Control 0) Register ........................ 249
RECON1 (Reference Control 1) Register ........................ 250
RECON2 (Reference Control 2) Register ........................ 250
Register
Register File ....................................................................... 39
Register File Summary ...................................................... 41
Registers
RCREG Register ..................................................... 199
ADCON0 (ADC Control 0) ....................................... 217
ADCON1 (ADC Control 1) ............................... 218, 219
ADRESH (ADC Result High) with ADFM = 0) ......... 220
ADRESH (ADC Result High) with ADFM = 1) ......... 220
ADRESL (ADC Result Low) with ADFM = 0) ........... 220
ADRESL (ADC Result Low) with ADFM = 1) ........... 220
ANSEL (Analog Select 1) .......................................... 98
ANSEL (PORT Analog Control) ................................. 98
ANSELH (Analog Select 2) ........................................ 99
ANSELH (PORT Analog Control) .............................. 99
BAUDCON (EUSART Baud Rate Control) .............. 194
BDnSTAT (Buffer Descriptor n Status, CPU Mode) 263
BDnSTAT (Buffer Descriptor n Status, SIE Mode) .. 264
CCP1CON (Enhanced Capture/Compare/PWM Control)
CM1CON0 (C1 Control) ........................................... 231
CM2CON0 (C2 Control) ........................................... 232
CM2CON1 (C2 Control) ........................................... 235
CONFIG1H (Configuration 1 High) .................. 295, 296
CONFIG1L (Configuration 1 Low) ........................... 295
CONFIG2H (Configuration 2 High) .......................... 298
CONFIG2L (Configuration 2 Low) ........................... 297
CONFIG3H (Configuration 3 High) .......................... 299
CONFIG4L (Configuration 4 Low) ........................... 299
CONFIG5H (Configuration 5 High) .......................... 300
CONFIG5L (Configuration 5 Low) ........................... 300
CONFIG6H (Configuration 6 High) .......................... 301
CONFIG6L (Configuration 6 Low) ........................... 301
CONFIG7H (Configuration 7 High) .......................... 302
CONFIG7L (Configuration 7 Low) ........................... 302
DEVID1 (Device ID 1) .............................................. 303
DEVID2 (Device ID 2) .............................................. 303
ECCPAS (Enhanced CCP Auto-shutdown Control) 129
EECON1 (Data EEPROM Control 1) ................... 53, 62
INTCON (Interrupt Control) ........................................ 69
INTCON2 (Interrupt Control 2) ................................... 70
INTCON3 (Interrupt Control 3) ................................... 71
IOCA (Interrupt-on-Change PORTA) ......................... 86
IOCB (Interrupt-on-Change PORTB) ......................... 91
IPR1 (Peripheral Interrupt Priority 1) ......................... 76
IPR2 (Peripheral Interrupt Priority 2) ......................... 77
LATA (PORTA Data Latch) ........................................ 86
LATB (PORTB Data Latch) ........................................ 91
LATC (PORTC Data Latch) ....................................... 95
OSCCON (Oscillator Control) .............................. 20, 21
OSCTUNE (Oscillator Tuning) ................................... 22
PIE1 (Peripheral Interrupt Enable 1) .......................... 74
PIE2 (Peripheral Interrupt Enable 2) .......................... 75
PIR1 (Peripheral Interrupt Request 1) ....................... 72
PIR2 (Peripheral Interrupt Request 2) ....................... 73
PORTA ...................................................................... 85
PORTB ................................................................ 90, 94
PSTRCON (Pulse Steering Control) ........................ 134
PWM1CON (Enhanced PWM Control) .................... 133
RCON (Reset Control) ....................................... 78, 280
RCSTA (Receive Status and Control) ..................... 193
.......................................................................... 117
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