PIC18LF14K50-I/P Microchip Technology, PIC18LF14K50-I/P Datasheet - Page 88
![IC PIC MCU FLASH 16KX10 20-PDIP](/photos/12/13/121303/150-20-dip_sml.jpg)
PIC18LF14K50-I/P
Manufacturer Part Number
PIC18LF14K50-I/P
Description
IC PIC MCU FLASH 16KX10 20-PDIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18F13K50-ISS.pdf
(420 pages)
2.PIC18F13K50-ISS.pdf
(40 pages)
3.PIC18F13K50-ISS.pdf
(10 pages)
4.PIC18F13K50-ISS.pdf
(2 pages)
5.PIC18F14K50-IP.pdf
(422 pages)
Specifications of PIC18LF14K50-I/P
Program Memory Type
FLASH
Program Memory Size
16KB (8K x 16)
Package / Case
20-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
14
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
EUSART/I2C/MSSP/SPI/USB
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
15
Number Of Timers
4
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM164127, DV164126
Minimum Operating Temperature
- 40 C
On-chip Adc
11-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18LF14K50-I/P
Manufacturer:
Microchip
Quantity:
450
- PIC18F13K50-ISS PDF datasheet
- PIC18F13K50-ISS PDF datasheet #2
- PIC18F13K50-ISS PDF datasheet #3
- PIC18F13K50-ISS PDF datasheet #4
- PIC18F14K50-IP PDF datasheet #5
- Current page: 88 of 422
- Download datasheet (5Mb)
PIC18F/LF1XK50
TABLE 9-2:
DS41350D-page 88
PORTA
LATA
TRISA
ANSEL
SLRCON
IOCA
WPUA
UCON
INTCON
INTCON2
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PORTA.
Note 1:
Name
2:
3:
RA<5:4> and their associated latch and data direction bits are enabled as I/O pins based on oscillator
configuration; otherwise, they are read as ‘0’.
Implemented only when Master Clear functionality is disabled (MCLRE Configuration bit = 0).
RA1 and RA0 are only available as port pins when the USB module is disabled (UCON<3> = 0).
GIE/GIEH PEIE/GIEL
RABPU
ANS7
Bit 7
—
—
—
—
—
—
—
SUMMARY OF REGISTERS ASSOCIATED WITH PORTA
INTEDG0 INTEDG1 INTEDG2
PPBRST
ANS6
Bit 6
—
—
—
—
—
—
TRISA5
LATA5
TMR0IE
WPUA5
IOCA5
RA5
ANS5
Bit 5
SE0
—
(1)
(1)
(1)
TRISA4
LATA4
PKTDIS
WPUA4
INT0IE
Preliminary
IOCA4
RA4
ANS4
Bit 4
—
(1)
(1)
(1)
WPUA3
IOCA3
USBEN
RA3
RABIE
ANS3
Bit 3
—
—
—
—
(2)
(2)
(2)
RESUME SUSPND
TMR0IP
TMR0IF
SLRC
Bit 2
—
—
—
—
—
—
IOCA1
INT0IF
RA1
SLRB
Bit 1
2010 Microchip Technology Inc.
—
—
—
—
—
(3)
(3)
IOCA0
RA0
RABIF
RABIP
SLRA
Bit 0
—
—
—
—
—
(3)
(3)
Values on
Reset
page
290
290
290
290
290
290
290
290
287
287
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