PIC24FJ16GA002-I/SP Microchip Technology, PIC24FJ16GA002-I/SP Datasheet - Page 135

• Manufacturer Part Number: PIC24FJ16GA002-I/SP
• Description: IC PIC MCU FLASH 16K 28-DIP
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ16GA002-I/SP

• Core Size: 16-Bit
• Program Memory Size: 16KB (5.5K x 24)
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Controller Family/series: PIC24
• No. Of I/o's: 21
• Ram Memory Size: 4KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• No. Of Pwm Channels: 5
• Embedded Interface Type: I2C, SPI, UART
• Rohs Compliant: Yes
• Processor Series: PIC24FJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 4 KB
• Interface Type: I2C, IrDA, SPI, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240011, MA240013, AC164127, DM300027, DV164033, DM240002
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 10 Channel
• Package: 28SPDIP
• Device Core: PIC
• Family Name: PIC24
• Maximum Speed: 32 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC162088 - HEADER MPLAB ICD2 24FJ64GA004 28AC164337 - MODULE SOCKET FOR PM3 40DIPDV164033 - KIT START EXPLORER 16 MPLAB ICD2
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

14.0
The Serial Peripheral Interface (SPI) module is a
synchronous serial interface useful for communicating
with other peripheral or microcontroller devices. These
peripheral devices may be serial EEPROMs, shift reg-
isters, display drivers, A/D Converters, etc. The SPI
module is compatible with Motorola’s SPI and SIOP
interfaces.
The module supports operation in two buffer modes. In
Standard mode, data is shifted through a single serial
buffer. In Enhanced Buffer mode, data is shifted
through an 8-level FIFO buffer.
The module also supports a basic framed SPI protocol
while operating in either Master or Slave mode. A total
of four framed SPI configurations are supported.
The SPI serial interface consists of four pins:
• SDIx: Serial Data Input
• SDOx: Serial Data Output
• SCKx: Shift Clock Input or Output
• SSx: Active-Low Slave Select or Frame
The SPI module can be configured to operate using 2,
3 or 4 pins. In the 3-pin mode, SSx is not used. In the
2-pin mode, both SDOx and SSx are not used.
Block diagrams of the module in Standard and
Enhanced modes are shown in Figure 14-1 and
Figure 14-2.
Depending on the pin count, devices of the
PIC24FJ64GA004 family offer one or two SPI modules
on a single device.
© 2007 Microchip Technology Inc.
Note:
Synchronization I/O Pulse
Note:
Note 1: This data sheet summarizes the features
2: This peripheral contains input functions
SERIAL PERIPHERAL
INTERFACE (SPI)
Do not perform read-modify-write opera-
tions (such as bit-oriented instructions) on
the SPIxBUF register in either Standard or
Enhanced Buffer mode.
In this section, the SPI modules are
referred to together as SPIx or separately
as SPI1 and SPI2. Special Function Reg-
isters will follow a similar notation. For
example, SPIxCON refers to the control
register for the SPI1 or SPI2 module.
of this group of PIC24F devices. It is not
intended
reference source. For more information,
refer to the associated “PIC24F Family
Reference Manual” chapter.
that may need to be configured by the
peripheral pin select feature. For more
information, see Section 9.4 “Peripheral
Pin Select”.
to
be
a
comprehensive
PIC24FJ64GA004 FAMILY
Preliminary
To set up the SPI module for the Standard Master mode
of operation:
1.
2.
3.
4.
5.
To set up the SPI module for the Standard Slave mode
of operation:
1.
2.
3.
4.
5.
6.
7.
If using interrupts:
a)
b)
c)
Write the desired settings to the SPIxCON
register with MSTEN (SPIxCON1<5>) = 1.
Clear the SPIROV bit (SPIxSTAT<6>).
Enable SPI operation by setting the SPIEN bit
(SPIxSTAT<15>).
Write the data to be transmitted to the SPIxBUF
register. Transmission (and reception) will start
as soon as data is written to the SPIxBUF
register.
Clear the SPIxBUF register.
If using interrupts:
a)
b)
c)
Write the desired settings to the SPIxCON1
and
(SPIxCON1<5>) = 0.
Clear the SMP bit.
If the CKE bit is set, then the SSEN bit
(SPIxCON1<7>) must be set to enable the SSx
pin.
Clear the SPIROV bit (SPIxSTAT<6>).
Enable SPI operation by setting the SPIEN bit
(SPIxSTAT<15>).
Clear the SPIxIF bit in the respective IFSx
register.
Set the SPIxIE bit in the respective IECx
register.
Write the SPIxIP bits in the respective IPCx
register to set the interrupt priority.
Clear the SPIxIF bit in the respective IFSx
register.
Set the SPIxIE bit in the respective IECx
register.
Write the SPIxIP bits in the respective IPCx
register to set the interrupt priority.
SPIxCON2
registers
DS39881B-page 133
with
MSTEN