PIC24FJ16GA002-I/SP Microchip Technology, PIC24FJ16GA002-I/SP Datasheet - Page 157
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PIC24FJ16GA002-I/SP
Manufacturer Part Number
PIC24FJ16GA002-I/SP
Description
IC PIC MCU FLASH 16K 28-DIP
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.PIC24FJ16GA002-ISS.pdf
(52 pages)
2.PIC24FJ16GA002-ISS.pdf
(268 pages)
3.PIC24FJ16GA002-ISS.pdf
(22 pages)
4.PIC24FJ64GA002-ISS.pdf
(256 pages)
Specifications of PIC24FJ16GA002-I/SP
Core Size
16-Bit
Program Memory Size
16KB (5.5K x 24)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
21
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC24
No. Of I/o's
21
Ram Memory Size
4KB
Cpu Speed
32MHz
No. Of Timers
5
No. Of Pwm Channels
5
Embedded Interface Type
I2C, SPI, UART
Rohs Compliant
Yes
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
I2C, IrDA, SPI, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
21
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240011, MA240013, AC164127, DM300027, DV164033, DM240002
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Package
28SPDIP
Device Core
PIC
Family Name
PIC24
Maximum Speed
32 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC162088 - HEADER MPLAB ICD2 24FJ64GA004 28AC164337 - MODULE SOCKET FOR PM3 40DIPDV164033 - KIT START EXPLORER 16 MPLAB ICD2
Eeprom Size
-
Lead Free Status / Rohs Status
Details
16.2
1.
2.
3.
4.
5.
6.
16.3
1.
2.
3.
4.
5.
6.
16.4
The following sequence will send a message frame
header made up of a Break, followed by an auto-baud
Sync byte.
1.
2.
3.
4.
5.
© 2007 Microchip Technology Inc.
Set up the UART:
a)
b)
c)
Enable the UART.
Set the UTXEN bit (causes a transmit interrupt).
Write data byte to lower byte of UxTXREG word.
The value will be immediately transferred to the
Transmit Shift Register (TSR), and the serial bit
stream will start shifting out with next rising edge
of the baud clock.
Alternately, the data byte may be transferred
while UTXEN = 0, and then the user may set
UTXEN. This will cause the serial bit stream to
begin immediately because the baud clock will
start from a cleared state.
A transmit interrupt will be generated as per
interrupt control bit, UTXISELx.
Set up the UART (as described in Section 16.2
“Transmitting in 8-Bit Data Mode”).
Enable the UART.
Set the UTXEN bit (causes a transmit interrupt).
Write UxTXREG as a 16-bit value only.
A word write to UxTXREG triggers the transfer
of the 9-bit data to the TSR. Serial bit stream will
start shifting out with the first rising edge of the
baud clock.
A transmit interrupt will be generated as per the
setting of control bit, UTXISELx.
Configure the UART for the desired mode.
Set UTXEN and UTXBRK – sets up the Break
character.
Load the UxTXREG with a dummy character to
initiate transmission (value is ignored).
Write ‘55h’ to UxTXREG – loads Sync character
into the transmit FIFO.
After the Break has been sent, the UTXBRK bit
is reset by hardware. The Sync character now
transmits.
Transmitting in 8-Bit Data Mode
Write appropriate values for data, parity and
Stop bits.
Write appropriate baud rate value to the
UxBRG register.
Set up transmit and receive interrupt enable
and priority bits.
Transmitting in 9-Bit Data Mode
Break and Sync Transmit
Sequence
PIC24FJ64GA004 FAMILY
Preliminary
16.5
1.
2.
3.
4.
5.
The act of reading the UxRXREG character will move
the next character to the top of the receive FIFO,
including a new set of PERR and FERR values.
16.6
UARTx Clear to Send (UxCTS) and Request to Send
(UxRTS) are the two hardware controlled pins that are
associated with the UART module. These two pins
allow the UART to operate in Simplex and Flow Control
mode. They are implemented to control the transmis-
sion and reception between the Data Terminal
Equipment (DTE). The UEN<1:0> bits in the UxMODE
register configure these pins.
16.7
The UART module provides two types of infrared UART
support: one is the IrDA clock output to support exter-
nal IrDA encoder and decoder device (legacy module
support) and the other is the full implementation of the
IrDA encoder and decoder. Note that because the IrDA
modes require a 16x baud clock, they will only work
when the BRGH bit (UxMODE<3>) is ‘0’.
16.8
To support external IrDA encoder and decoder devices,
the BCLKx pin (same as the UxRTS pin) can be
configured to generate the 16x baud clock. With
UEN<1:0> = 11, the BCLKx pin will output the 16x
baud clock if the UART module is enabled. It can be
used to support the IrDA codec chip.
16.9
The UART has full implementation of the IrDA encoder
and decoder as part of the UART module. The built-in
IrDA encoder and decoder functionality is enabled
using the IREN bit (UxMODE<12>). When enabled
(IREN = 1), the receive pin (UxRX) acts as the input
from the infrared receiver. The transmit pin (UxTX) acts
as the output to the infrared transmitter.
Set up the UART (as described in Section 16.2
“Transmitting in 8-Bit Data Mode”).
Enable the UART.
A receive interrupt will be generated when one
or more data characters have been received as
per interrupt control bit, URXISELx.
Read the OERR bit to determine if an overrun
error has occurred. The OERR bit must be reset
in software.
Read UxRXREG.
Receiving in 8-Bit or 9-Bit Data
Mode
Operation of UxCTS and UxRTS
Control Pins
Infrared Support
External IrDA Support – IrDA
Clock Output
Built-in IrDA Encoder and Decoder
DS39881B-page 155