PIC16F639-I/SS Microchip Technology, PIC16F639-I/SS Datasheet - Page 51

IC MCU FLASH 2KX14 20SSOP

PIC16F639-I/SS

Manufacturer Part Number
PIC16F639-I/SS
Description
IC MCU FLASH 2KX14 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F639-I/SS

Program Memory Type
FLASH
Program Memory Size
3.5KB (2K x 14)
Package / Case
20-SSOP
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, LVD, POR, WDT
Number Of I /o
11
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT20SS1-1 - SOCKET TRANSITION 20DIP 20SSOPXLT20SS-1 - SOCKET TRANSITION 18DIP 20SSOPAC162066 - HEADER INTRFC MPLAB ICD2 20PINAC164307 - MODULE SKT FOR PM3 28SSOP
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
8.0
The EEPROM data memory is readable and writable
during normal operation (full V
is not directly mapped in the register file space.
Instead, it is indirectly addressed through the Special
Function Registers. There are four SFRs used to read
and write this memory:
• EECON1
• EECON2 (not a physically implemented register)
• EEDATA
• EEADR
EEDATA holds the 8-bit data for read/write, and
EEADR holds the address of the EEPROM location
being accessed. PIC16F630/676 devices have 128
bytes of data EEPROM with an address range from 0h
to 7Fh.
REGISTER 8-1:
REGISTER 8-2:
 2003 Microchip Technology Inc.
DATA EEPROM MEMORY
bit 7-0
bit 7
bit 6-0
EEDAT — EEPROM DATA REGISTER (ADDRESS: 9Ah)
EEADR — EEPROM ADDRESS REGISTER (ADDRESS: 9Bh)
bit 7
EEDATn: Byte value to write to or read from Data EEPROM
bit 7
Unimplemented: Should be set to '0'
EEADR: Specifies one of 128 locations for EEPROM Read/Write Operation
Legend:
R = Readable bit
- n = Value at POR
Legend:
R = Readable bit
- n = Value at POR
EEDAT7
R/W-0
U-0
DD
range). This memory
EEDAT6
EADR6
R/W-0
R/W-0
EEDAT5
EADR5
R/W-0
R/W-0
W = Writable bit
’1’ = Bit is set
W = Writable bit
’1’ = Bit is set
EEDAT4
EADR4
R/W-0
R/W-0
The EEPROM data memory allows byte read and write.
A byte write automatically erases the location and
writes the new data (erase before write). The EEPROM
data memory is rated for high erase/write cycles. The
write time is controlled by an on-chip timer. The write
time will vary with voltage and temperature as well as
from chip to chip. Please refer to AC Specifications for
exact limits.
When the data memory is code protected, the CPU
may continue to read and write the data EEPROM
memory. The device programmer can no longer access
this memory.
Additional information on the Data EEPROM is
available in the PICmicro™ Mid-Range Reference
Manual, (DS33023).
EEDAT3
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
EADR3
R/W-0
R/W-0
PIC16F630/676
EEDAT2 EEDAT1
EADR2
R/W-0
R/W-0
x = Bit is unknown
x = Bit is unknown
EADR1
R/W-0
R/W-0
DS40039C-page 49
EEDAT0
EADR0
R/W-0
R/W-0
bit 0
bit 0

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