PIC18F45J50-I/PT Microchip Technology, PIC18F45J50-I/PT Datasheet - Page 173

IC PIC MCU FLASH 32K 2V 44-TQFP

PIC18F45J50-I/PT

Manufacturer Part Number
PIC18F45J50-I/PT
Description
IC PIC MCU FLASH 32K 2V 44-TQFP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F45J50-I/PT

Program Memory Type
FLASH
Program Memory Size
32KB (16K x 16)
Package / Case
44-TQFP, 44-VQFP
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
34
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
EUSART, I2C, SPI
Maximum Clock Frequency
48 MHz
Number Of Timers
5
Operating Supply Voltage
2.25 V to 2.75 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183032, MA180024, DM183022
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 13 Channel
Controller Family/series
PIC18
No. Of I/o's
22
Ram Memory Size
3776Byte
Cpu Speed
48MHz
No. Of Timers
5
Embedded Interface Type
EUSART, I2C, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F45J50-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
10.2.2
When chip select is active and a write strobe occurs
(PMCS = 1 and PMWR = 1), the data from PMD<7:0>
is captured into the lower PMDIN1L register. The
PMPIF and IBF flag bits are set when the write
ends.The timing for the control signals in Write mode is
displayed in Figure 10-3. The polarity of the control
signals are configurable.
FIGURE 10-3:
FIGURE 10-4:
© 2009 Microchip Technology Inc.
PMD<7:0>
PMD<7:0>
PMCS1
PMCS1
PMWR
PMWR
PMPIF
PMPIF
PMRD
PMRD
OBE
OBE
IBF
IBF
WRITE TO SLAVE PORT
PARALLEL SLAVE PORT WRITE WAVEFORMS
PARALLEL SLAVE PORT READ WAVEFORMS
PIC18F46J50 FAMILY
10.2.3
When chip select is active and a read strobe occurs
(PMCS = 1 and PMRD = 1), the data from the
PMDOUT1L register (PMDOUT1L<7:0>) is presented
onto PMD<7:0>. Figure 10-4 provides the timing for the
control signals in Read mode.
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READ FROM SLAVE PORT
Q4
Q4
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Q1
Q1
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Q2
Q2
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DS39931C-page 173
Q3
Q3
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Q4
Q4

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