ATMEGA8535L-8AU Atmel, ATMEGA8535L-8AU Datasheet - Page 240

IC AVR MCU 8K 8MHZ 3V 44TQFP

ATMEGA8535L-8AU

Manufacturer Part Number
ATMEGA8535L-8AU
Description
IC AVR MCU 8K 8MHZ 3V 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA8535L-8AU

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Processor Series
ATMEGA8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SPI, TWI, USART
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Parallel Programming
Parameters, Pin
Mapping, and
Commands
Signal Names
240
ATmega8535(L)
This section describes how to parallel program and verify Flash Program memory,
EEPROM Data memory, Memory Lock bits, and Fuse bits in the ATmega8535. Pulses
are assumed to be at least 250 ns unless otherwise noted.
In this section, some pins of the ATmega8535 are referenced by signal names describ-
ing their functionality during parallel programming, see Figure 115 and Table 100. Pins
not described in the following table are referenced by pin names.
The XA1/XA0 pins determine the action executed when the XTAL1 pin is given a posi-
tive pulse. The bit coding is shown in Table 102.
When pulsing WR or OE, the command loaded determines the action executed. The dif-
ferent Commands are shown in Table 103.
Figure 115. Parallel Programming
Table 100. Pin Name Mapping
Signal Name in
Programming Mode
RDY/BSY
OE
WR
BS1
XA0
XA1
PAGEL
BS2
DATA
RDY/BSY
PAGEL
Pin Name
+12 V
PB7 - 0
BS1
XA0
XA1
BS2
WR
OE
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PA0
I/O
I/O
O
PD1
PD2
PD3
PD4
PD5
PD6
PD7
RESET
XTAL1
GND
PA0
I
I
I
I
I
I
I
Function
0: Device is busy programming, 1: Device is ready
for new command
Output Enable (Active low)
Write Pulse (Active low)
Byte Select 1 (“0” selects low byte, “1” selects high
byte)
XTAL Action Bit 0
XTAL Action Bit 1
Program Memory and EEPROM data Page Load
Byte Select 2 (“0” selects low byte, “1” selects 2’nd
high byte)
Bi-directional Data bus (Output when OE is low)
PB7 - PB0
AVCC
VCC
+5V
DATA
2502K–AVR–10/06

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