ATMEGA128RZAV-8AU Atmel, ATMEGA128RZAV-8AU Datasheet

MCU ATMEGA1281/AT86RF230 64-TQFP

ATMEGA128RZAV-8AU

Manufacturer Part Number
ATMEGA128RZAV-8AU
Description
MCU ATMEGA1281/AT86RF230 64-TQFP
Manufacturer
Atmel
Series
ATMEGAr
Datasheets

Specifications of ATMEGA128RZAV-8AU

Frequency
2.4GHz
Data Rate - Maximum
2Mbps
Modulation Or Protocol
802.15.4 Zigbee
Applications
General Purpose
Power - Output
3dBm
Sensitivity
-101dBm
Voltage - Supply
1.8 V ~ 3.6 V
Data Interface
PCB, Surface Mount
Memory Size
128kB Flash, 4kB EEPROM, 8kB RAM
Antenna Connector
PCB, Surface Mount
Package / Case
64-TQFP
Wireless Frequency
2.4 GHz
Interface Type
JTAG, SPI
Output Power
3 dBm
Operating Temperature Range
- 40 C to + 85 C
For Use With
770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Current - Transmitting
-
Current - Receiving
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
ATmega128
Features
High Performance, Low Power Atmel
Advanced RISC Architecture
High Endurance Non-volatile Memory Segments
JTAG (IEEE std. 1149.1 compliant) Interface
Peripheral Features
Special Microcontroller Features
I/O and Packages
Temperature Range:
Ultra-Low Power Consumption
Speed Grade:
– 135 Powerful Instructions – Most Single Clock Cycle Execution
– 32 × 8 General Purpose Working Registers
– Fully Static Operation
– Up to 16 MIPS Throughput at 16 MHz
– On-Chip 2-cycle Multiplier
– 64K/128K/256K Bytes of In-System Self-Programmable Flash
– 4 Kbytes EEPROM
– 8 Kbytes Internal SRAM
– Write/Erase Cycles:10,000 Flash/100,000 EEPROM
– Data retention: 20 years at 85°C/ 100 years at 25°C
– Optional Boot Code Section with Independent Lock Bits
– Programming Lock for Software Security
– Boundary-scan Capabilities According to the JTAG Standard
– Extensive On-chip Debug Support
– Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface
– Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode
– Four 16-bit Timer/Counter with Separate Prescaler, Compare- and Capture Mode
– Real Time Counter with Separate Oscillator
– Four 8-bit PWM Channels
– Six/Twelve PWM Channels with Programmable Resolution from 2 to 16 Bits
– Output Compare Modulator
– 8/16-channel, 10-bit ADC (ATmega1281/2561, ATmega640/1280/2560)
– Two/Four Programmable Serial USART (ATmega1281/2561, ATmega640/1280/2560)
– Master/Slave SPI Serial Interface
– Byte Oriented 2-wire Serial Interface
– Programmable Watchdog Timer with Separate On-chip Oscillator
– On-chip Analog Comparator
– Interrupt and Wake-up on Pin Change
– Power-on Reset and Programmable Brown-out Detection
– Internal Calibrated Oscillator
– External and Internal Interrupt Sources
– Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby,
– 54/86 Programmable I/O Lines (ATmega1281/2561, ATmega640/1280/2560)
– 64-pad QFN/MLF, 64-lead TQFP (ATmega1281/2561)
– 100-lead TQFP, 100-ball CBGA (ATmega640/1280/2560)
– RoHS/Fully Green
– -40°C to 85°C Industrial
– Active Mode: 1 MHz, 1.8V: 500 µA
– Power-down Mode: 0.1 µA at 1.8V
– ATmega640V/ATmega1280V/ATmega1281V:
– ATmega2560V/ATmega2561V:
– ATmega640/ATmega1280/ATmega1281:
– ATmega2560/ATmega2561:
(ATmega1281/2561, ATmega640/1280/2560)
and Extended Standby
• In-System Programming by On-chip Boot Program
• True Read-While-Write Operation
• Endurance: Up to 64 Kbytes Optional External Memory Space
• 0 - 4 MHz @ 1.8V - 5.5V, 0 - 8 MHz @ 2.7V - 5.5V
• 0 - 2 MHz @ 1.8V - 5.5V, 0 - 8 MHz @ 2.7V - 5.5V
• 0 - 8 MHz @ 2.7V - 5.5V, 0 - 16 MHz @ 4.5V - 5.5V
• 0 - 16 MHz @ 4.5V - 5.5V
®
AVR
®
8-Bit Microcontroller
8-bit
Microcontroller
with
64K/128K/256K
Bytes In-System
Programmable
Flash
ATmega640/V
ATmega1280/V
ATmega1281/V
ATmega2560/V
ATmega2561/V
Preliminary
Summary
2549MS–AVR–09/10

Related parts for ATMEGA128RZAV-8AU

ATMEGA128RZAV-8AU Summary of contents

Page 1

... Features • High Performance, Low Power Atmel • Advanced RISC Architecture – 135 Powerful Instructions – Most Single Clock Cycle Execution – 32 × 8 General Purpose Working Registers – Fully Static Operation – MIPS Throughput at 16 MHz – On-Chip 2-cycle Multiplier • ...

Page 2

Pin Configurations Figure 1-1. TQFP-pinout ATmega640/1280/2560 100 (OC0B) PG5 1 (RXD0/PCINT8) PE0 2 (TXD0) PE1 ...

Page 3

Figure 1-2. CBGA-pinout ATmega640/1280/2560 Top view Table 1- Note: 2549MS–AVR–09/10 ATmega640/1280/1281/2560/2561 ...

Page 4

Figure 1-3. Pinout ATmega1281/2561 1 (OC0B) PG5 2 (RXD0/ PCINT8 /PDI) PE0 3 (TXD0/PDO) PE1 4 (XCK0/AIN0) PE2 5 (OC3A/AIN1) PE3 6 (OC3B/INT4) PE4 7 (OC3C/INT5) PE5 8 (T3/INT6) PE6 9 (ICP3/ CLKO /INT7) PE7 10 (SS/ PCINT0 ) PB0 ...

Page 5

Overview The ATmega640/1280/1281/2560/2561 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega640/1280/1281/2560/2561 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to ...

Page 6

... This allows very fast start-up combined with low power consumption. In Extended Standby mode, both the main Oscillator and the Asynchronous Timer continue to run. The device is manufactured using Atmel’s high-density nonvolatile memory technology. The On- chip ISP Flash allows the program memory to be reprogrammed in-system through an SPI serial interface conventional nonvolatile memory programmer On-chip Boot program running on the AVR core ...

Page 7

Comparison Between ATmega1281/2561 and ATmega640/1280/2560 Each device in the ATmega640/1280/1281/2560/2561 family differs only in memory size and number of pins. Table 2-1. Configuration Summary Device Flash EEPROM ATmega640 64KB ATmega1280 128KB ATmega1281 128KB ATmega2560 256KB ATmega2561 256KB 2.3 Pin ...

Page 8

The Port C pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port C also serves the functions of special features of the ATmega640/1280/1281/2560/2561 as listed on 2.3.6 Port D ...

Page 9

The Port H pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port H also serves the functions of various special features of the ATmega640/1280/2560 as listed on 2.3.11 Port ...

Page 10

AVCC AVCC is the supply voltage pin for Port F and the A/D Converter. It should be externally con- nected to V through a low-pass filter. 2.3.18 AREF This is the analog reference pin for the A/D Converter. 2549MS–AVR–09/10 ...

Page 11

... Resources A comprehensive set of development tools and application notes, and datasheets are available for download on http://www.atmel.com/avr. 4. About Code Examples This documentation contains simple code examples that briefly show how to use various parts of the device. Be aware that not all C compiler vendors include bit definitions in the header files and interrupt handling compiler dependent ...

Page 12

Register Summary Address Name Bit 7 (0x1FF) Reserved - ... Reserved - (0x13F) Reserved (0x13E) Reserved (0x13D) Reserved (0x13C) Reserved (0x13B) Reserved (0x13A) Reserved (0x139) Reserved (0x138) Reserved (0x137) Reserved (0x136) UDR3 (0x135) UBRR3H - (0x134) UBRR3L (0x133) Reserved ...

Page 13

Address Name Bit 7 (0x100) PINH PINH7 (0xFF) Reserved - (0xFE) Reserved - (0xFD) Reserved - (0xFC) Reserved - (0xFB) Reserved - (0xFA) Reserved - (0xF9) Reserved - (0xF8) Reserved - (0xF7) Reserved - (0xF6) Reserved - (0xF5) Reserved - ...

Page 14

Address Name Bit 7 (0xBE) Reserved - (0xBD) TWAMR TWAM6 (0xBC) TWCR TWINT (0xBB) TWDR (0xBA) TWAR TWA6 (0xB9) TWSR TWS7 (0xB8) TWBR (0xB7) Reserved - (0xB6) ASSR - (0xB5) Reserved - (0xB4) OCR2B (0xB3) OCR2A (0xB2) TCNT2 (0xB1) TCCR2B ...

Page 15

Address Name Bit 7 (0x7C) ADMUX REFS1 (0x7B) ADCSRB - (0x7A) ADCSRA ADEN (0x79) ADCH (0x78) ADCL (0x77) Reserved - (0x76) Reserved - (0x75) XMCRB XMBK (0x74) XMCRA SRE (0x73) TIMSK5 - (0x72) TIMSK4 - (0x71) TIMSK3 - (0x70) TIMSK2 ...

Page 16

Address Name Bit 7 0x1A (0x3A) TIFR5 - 0x19 (0x39) TIFR4 - 0x18 (0x38) TIFR3 - 0x17 (0x37) TIFR2 - 0x16 (0x36) TIFR1 - 0x15 (0x35) TIFR0 - 0x14 (0x34) PORTG - 0x13 (0x33) DDRG - 0x12 (0x32) PING - ...

Page 17

Instruction Set Summary Mnemonics Operands ARITHMETIC AND LOGIC INSTRUCTIONS ADD Rd, Rr Add two Registers ADC Rd, Rr Add with Carry two Registers ADIW Rdl,K Add Immediate to Word SUB Rd, Rr Subtract two Registers SUBI Rd, K Subtract ...

Page 18

Mnemonics Operands BRVS k Branch if Overflow Flag is Set BRVC k Branch if Overflow Flag is Cleared BRIE k Branch if Interrupt Enabled BRID k Branch if Interrupt Disabled BIT AND BIT-TEST INSTRUCTIONS SBI P,b Set Bit in I/O ...

Page 19

Mnemonics Operands ELPM Rd, Z+ Extended Load Program Memory SPM Store Program Memory IN Rd Port OUT P, Rr Out Port PUSH Rr Push Register on Stack POP Rd Pop Register from Stack MCU CONTROL INSTRUCTIONS NOP No ...

Page 20

... Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2. See “Speed Grades” on page 369. 3. Pb-free packaging, complies to the European Directive for Restriction of Hazardous Substances (RoHS directive). Also Halide free and fully Green ...

Page 21

... Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2. See “Speed Grades” on page 3. Pb-free packaging, complies to the European Directive for Restriction of Hazardous Substances (RoHS directive). Also Halide free and fully Green ...

Page 22

... Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2. See “Speed Grades” on page 3. Pb-free packaging, complies to the European Directive for Restriction of Hazardous Substances (RoHS directive). Also Halide free and fully Green ...

Page 23

... Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2. See “Speed Grades” on page 3. Pb-free packaging, complies to the European Directive for Restriction of Hazardous Substances (RoHS directive). Also Halide free and fully Green ...

Page 24

... Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2. See “Speed Grades” on page 3. Pb-free packaging, complies to the European Directive for Restriction of Hazardous Substances (RoHS directive). Also Halide free and fully Green ...

Page 25

Packaging Information 9.1 100A PIN 0˚~7˚ L Notes: 1. This package conforms to JEDEC reference MS-026, Variation AED. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. Dimensions ...

Page 26

D e 0.90 TYP 0.90 TYP 2325 Orchard Parkway San Jose, CA 95131 R 2549MS–AVR–09/10 ATmega640/1280/1281/2560/2561 E Marked A1 Identifier TOP VIEW Øb A1 Corner ...

Page 27

PIN 0°~7° L Notes: 1.This package conforms to JEDEC reference MS-026, Variation AEB. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. Dimensions D1 and E1 are ...

Page 28

Marked Pin TOP VIEW BOTTOM VIEW Note: 1. JEDEC Standard MO-220, (SAW Singulation) Fig. 1, VMMD. 2. Dimension and tolerance conform to ASMEY14.5M-1994. 2325 Orchard Parkway San Jose, CA 95131 ...

Page 29

Errata 10.1 ATmega640 rev. A • Inaccurate ADC conversion in differential mode with 200× gain. • High current consumption in sleep mode. 1. Inaccurate ADC conversion in differential mode with 200× gain With AVCC <3.6V, random conversions will be ...

Page 30

High current consumption in sleep mode If a pending interrupt cannot wake the part up from the selected sleep mode, the current consumption will increase during sleep when executing the SLEEP instruction directly after a SEI instruction. Problem Fix/Workaround ...

Page 31

Problem Fix/Workaround Do not use the part at voltages below 2.4 volts. 3. Incorrect ADC reading in differential mode The ADC has high noise in differential mode. It can give LSB error. Problem Fix/Workaround Use only the ...

Page 32

ATmega2561 rev. C • High current consumption in sleep mode. 1. High current consumption in sleep mode If a pending interrupt cannot wake the part up from the selected sleep mode, the current consumption will increase during sleep when ...

Page 33

The actual value of the reference can be measured by applying a known voltage to the ADC when using the internal reference. The result when doing later conversions can then be calibrated. 5. IN/OUT instructions may be executed twice ...

Page 34

Datasheet Revision History Please note that the referring page numbers in this section are referring to this document.The referring revision in this section are referring to the document revision. 11.1 Rev. 2549M-09/ ...

Page 35

Rev. 2549K-01/ 10. 11.4 Rev. 2549J-09/ 11.5 Rev. 2549I-07/ 11.6 Rev. 2549H-06/ 2549MS–AVR–09/10 ATmega640/1280/1281/2560/2561 Updated Table 1-1 on ...

Page 36

Rev. 2549G-06/ 10. 11.8 Rev. 2549F-04/ 11.9 Rev. 2549E-04/ 11.10 Rev. 2549D-12/ ...

Page 37

Rev. 2549C-09/ 11.12 Rev. 2549B-05/ 11.13 Rev. 2549A-03/05 1. 2549MS–AVR–09/10 ATmega640/1280/1281/2560/2561 Updated Text in “ADCSRB – ADC Control and Status ...

Page 38

... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...

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