PIC16F870-I/SS Microchip Technology, PIC16F870-I/SS Datasheet - Page 15

• Manufacturer Part Number: PIC16F870-I/SS
• Description: IC MCU FLASH 2KX14 EE 28SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F870-I/SS

• Core Size: 8-Bit
• Program Memory Size: 3.5KB (2K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Type: FLASH
• Eeprom Size: 64 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SSOP
• Controller Family/series: PIC16F
• No. Of I/o's: 22
• Eeprom Memory Size: 64Byte
• Ram Memory Size: 128Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 8
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022, DV164120
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 28 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: I3-DB16F871 - BOARD DAUGHTER ICEPIC3AC164307 - MODULE SKT FOR PM3 28SSOPAC164020 - MODULE SKT PROMATEII 44TQFPXLT28SS-1 - SOCKET TRANSITION ICE 28SSOP
• Lead Free Status / Rohs Status: Details

2.2.2
The Special Function Registers are registers used by
the CPU and peripheral modules for controlling the
desired operation of the device. These registers are
implemented as static RAM. A list of these registers is
given in Table 2-1.
TABLE 2-1:
 2003 Microchip Technology Inc.
Bank 0
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
Legend:
Note 1:
Address
(4)
(4)
(4)
(4)
(5)
(5)
(1,4)
(4)
2:
3:
4:
5:
INDF
TMR0
PCL
STATUS
FSR
PORTA
PORTB
PORTC
PORTD
PORTE
PCLATH
INTCON
PIR1
PIR2
TMR1L
TMR1H
T1CON
TMR2
T2CON
CCPR1L
CCPR1H
CCP1CON
RCSTA
TXREG
RCREG
ADRESH
ADCON0
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as '0', r = reserved.
Shaded locations are unimplemented, read as ‘0’.
The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8> whose
contents are transferred to the upper byte of the program counter.
Other (non Power-up) Resets include external RESET through MCLR and Watchdog Timer Reset.
Bits PSPIE and PSPIF are reserved on the 28-pin devices; always maintain these bits clear.
These registers can be addressed from any bank.
PORTD, PORTE, TRISD and TRISE are not physically implemented on the 28-pin devices, read as ‘0’.
SPECIAL FUNCTION REGISTERS
Name
—
—
—
—
—
SPECIAL FUNCTION REGISTER SUMMARY
Addressing this location uses contents of FSR to address data memory (not a physical register)
Timer0 Module’s Register
Program Counter's (PC) Least Significant Byte
Indirect Data Memory Address Pointer
PORTB Data Latch when written: PORTB pins when read
PORTC Data Latch when written: PORTC pins when read
PORTD Data Latch when written: PORTD pins when read
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
Timer2 Module’s Register
Unimplemented
Unimplemented
Capture/Compare/PWM Register1 (LSB)
Capture/Compare/PWM Register1 (MSB)
USART Transmit Data Register
USART Receive Data Register
Unimplemented
Unimplemented
Unimplemented
A/D Result Register High Byte
PSPIF
ADCS1
SPEN
Bit 7
IRP
GIE
—
—
—
—
—
—
—
(3)
TOUTPS3 TOUTPS2 TOUTPS1
ADCS0
Bit 6
PEIE
ADIF
RP1
RX9
—
—
—
—
—
—
PORTA Data Latch when written: PORTA pins when read
T1CKPS1 T1CKPS0
CCP1X
SREN
CHS2
Bit 5
RCIF
T0IE
RP0
—
—
—
Write Buffer for the upper 5 bits of the Program Counter
CCP1Y
CREN
CHS1
Bit 4
INTE
EEIF
TXIF
TO
—
T1OSCEN
TOUTPS0
CCP1M3
ADDEN
CHS0
Bit 3
RBIE
PD
The Special Function Registers can be classified into
two sets: core (CPU) and peripheral. Those registers
associated with the core functions are described in
detail in this section. Those related to the operation of
the peripheral features are described in detail in the
peripheral feature section.
—
—
—
GO/DONE
TMR2ON
CCP1M2
T1SYNC
CCP1IF
FERR
Bit 2
RE2
T0IF
—
Z
PIC16F870/871
T2CKPS1 T2CKPS0 -000 0000 -000 0000
TMR1CS TMR1ON --00 0000 --uu uuuu
CCP1M1
TMR2IF
OERR
Bit 1
INTF
RE1
DC
—
—
CCP1M0 --00 0000 --00 0000
TMR1IF
ADON
RX9D
Bit 0
RBIF
RE0
—
C
POR, BOR
0000 0000 0000 0000
xxxx xxxx uuuu uuuu
0000 0000 0000 0000
0001 1xxx 000q quuu
xxxx xxxx uuuu uuuu
--0x 0000 --0u 0000
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
---- -xxx ---- -uuu
---0 0000 ---0 0000
0000 000x 0000 000u
0000 -000 0000 -000
---0 ---- ---0 ----
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
0000 0000 0000 0000
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
0000 000x 0000 000x
0000 0000 0000 0000
0000 0000 0000 0000
xxxx xxxx uuuu uuuu
0000 00-0 0000 00-0
Value on:
DS30569B-page 13
—
—
—
—
—
RESETS
Value on
all other
—
—
—
—
—
(2)