DSPIC30F2012-30I/SP Microchip Technology, DSPIC30F2012-30I/SP Datasheet - Page 36
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DSPIC30F2012-30I/SP
Manufacturer Part Number
DSPIC30F2012-30I/SP
Description
IC DSPIC MCU/DSP 12K 28DIP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F2011-20ISO.pdf
(210 pages)
3.DSPIC30F2011-20ISO.pdf
(14 pages)
4.DSPIC30F2011-20ISO.pdf
(6 pages)
5.DSPIC30F2011-20ISO.pdf
(18 pages)
6.DSPIC30F2012-30ISO.pdf
(205 pages)
7.DSPIC30F2011-20IP.pdf
(206 pages)
Specifications of DSPIC30F2012-30I/SP
Program Memory Type
FLASH
Program Memory Size
12KB (4K x 24)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
20
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC30F
Core
dsPIC
Maximum Clock Frequency
30 MHz
Number Of Programmable I/os
12
Data Ram Size
1 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300027, DM330011, DM300018, DM183021
Minimum Operating Temperature
- 40 C
Core Frequency
30MHz
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
20
Flash Memory Size
12KB
Supply Voltage Range
2.5V To 5.5V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
DSPIC30F201230ISP
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F2012-30I/SP
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
11.3
The ICSP mode is entered by holding PGC and PGD
low, raising MCLR/V
performing additional steps as illustrated in
4.
FIGURE 11-4:
DS70102K-page 36
Note 1: The sequence that places the device into
MCLR/V
2: Once ICSP mode is entered, the PC is
3: Before leaving the Reset vector, execute
Entering ICSP Mode
PGD
PGC
V
ICSP mode places all unused I/O pins to
the high-impedance state.
set to 0x0 (the Reset vector).
two GOTO instructions, followed by a
single NOP instruction must be executed.
DD
PP
V
IHH
PP
ENTERING ICSP™ MODE
to V
P6
IHH
(high voltage), and then
4 ms
10 μs
Figure 11-
4 ms
Execute 2 NOP instructions
0
0 0 0
© 2010 Microchip Technology Inc.