PIC18F6310-I/PT Microchip Technology, PIC18F6310-I/PT Datasheet
PIC18F6310-I/PT
Manufacturer Part Number
PIC18F6310-I/PT
Description
IC PIC MCU FLASH 4KX16 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F6310-IPT.pdf
(412 pages)
2.PIC18F6310-IPT.pdf
(16 pages)
3.PIC18F6310-IPT.pdf
(4 pages)
4.PIC18F6310-IPT.pdf
(28 pages)
5.PIC18F6310-IPT.pdf
(6 pages)
6.PIC18F6310-IPT.pdf
(4 pages)
7.PIC18F8310-IPT.pdf
(404 pages)
Specifications of PIC18F6310-I/PT
Program Memory Type
FLASH
Program Memory Size
8KB (4K x 16)
Package / Case
64-TFQFP
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
54
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SPI/I2C/EUSART/AUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
54
Number Of Timers
4
Operating Supply Voltage
4.2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032
Minimum Operating Temperature
- 40 C
On-chip Adc
12-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT64PT5 - SOCKET TRAN ICE 64MQFP/TQFPAC164319 - MODULE SKT MPLAB PM3 64TQFPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F6310-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
The PIC18F6310/6410/8310/8410 Rev. C1 parts you
have received conform functionally to the Device Data
Sheet
described below. Any Data Sheet Clarification issues
related to the PIC18F6310/6410/8310/8410 will be
reported in a separate Data Sheet errata. Please check
the Microchip web site for any existing issues.
All of the issues listed here will be addressed in future
revisions of the PIC18F6310/6410/8310/8410 silicon.
The
PIC18F6310/6410/8310/8410 devices with these
Device/Revision IDs:
1. Module: Master Synchronous Serial Port
2009 Microchip Technology Inc.
The Device IDs (DEVID1 and DEVID2) are located at
addresses
configuration space. They are shown in hexadecimal
in the format “DEVID2 DEVID1”.
Part Number
PIC18F6310
PIC18F6410
PIC18F8310
PIC18F8410
Configured in SPI slave mode, the MSSP will gen-
erate a write collision if SSPBUF is updated and
the previous SSPBUF contents have not been
transferred to the shift register.
Reinitializing the MSSP, by clearing and setting the
SSPEN bit (SSPCON1<5>) prior to rewriting
SSPBUF, will not prevent the error condition.
Work around
Prior to updating the SSPBUF register with a new
value, verify that the previous contents have been
transferred by reading the BF bit (SSPSTAT<0>).
If the previous byte has not been transferred:
• Update SSPBUF
• If necessary, clear the WCOL bit
Date Codes that pertain to this issue:
All engineering and production devices.
following
(SSPCON1<7>)
(DS39635B),
PIC18F6310/6410/8310/8410 Rev. C1 Silicon Errata
3FFFFEh:3FFFFFh
(MSSP)
silicon
0000 1011 111
0000 0110 111
0000 1011 110
0000 0110 110
Device ID
except
errata apply
for
in
the
PIC18F6310/6410/8310/8410
Revision ID
the
0 0110
0 0110
0 0110
0 0110
anomalies
only
device’s
to
2. Module: MSSP – Serial Peripheral
3. Module: MSSP – I
In SPI mode, the Buffer Full flag (BF bit in the
SSPSTAT register), the Write Collision Detect bit
(WCOL in SSPCON1) and the Receive Overflow
Indicator bit (SSPOV in SSPCON1) are not reset
upon disabling the SPI module (by clearing the
SSPEN bit in the SSPCON1 register).
For example, if SSPBUF is full (BF bit is set) and
the MSSP module is disabled and re-enabled, the
BF bit will remain set. In SPI Slave mode, a sub-
sequent write to SSPBUF will result in a write
collision. Also, if a new byte is received, a receive
overflow will occur.
Work around
If if the buffer is full, before disabling the MSSP
module, ensure that:
• SSPBUF is read (thus clearing the BF flag)
• WCOL is clear
If the module is configured in SPI Slave mode,
ensure that the SSPOV bit is clear before disabling
the module.
Date Codes that pertain to this issue:
All engineering and production devices.
In the 10-Bit Slave mode, the I
work correctly.
Work around
None.
Date Codes that pertain to this issue:
All engineering and production devices.
Interface (SPI)
2
C™
2
C™ mode does not
DS80492A-page 1
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PIC18F6310-I/PT Summary of contents
Page 1
... Any Data Sheet Clarification issues related to the PIC18F6310/6410/8310/8410 will be reported in a separate Data Sheet errata. Please check the Microchip web site for any existing issues. All of the issues listed here will be addressed in future revisions of the PIC18F6310/6410/8310/8410 silicon. ...
Page 2
... PIC18F6310/6410/8310/8410 2 4. Module: MSSP – When configured for I C™ slave reception, the MSSP module may not receive the correct data, in extremely rare cases. This occurs only if the Serial Receive/Transmit Buffer Register (SSPBUF) is not read within a window after the SSPIF interrupt (PIR1< ...
Page 3
... REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
Page 4
... Fax: 886-3-6578-370 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 2009 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...