PIC24FJ64GA102-I/ML Microchip Technology, PIC24FJ64GA102-I/ML Datasheet - Page 132
PIC24FJ64GA102-I/ML
Manufacturer Part Number
PIC24FJ64GA102-I/ML
Description
IC MCU 16BIT 64KB FLASH 28QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheets
1.PIC24FJ32GA102-ISP.pdf
(308 pages)
2.PIC24FJ32GA102-ISP.pdf
(12 pages)
3.PIC24FJ32GA102-ISP.pdf
(48 pages)
4.PIC24FJ64GA104-IML.pdf
(300 pages)
Specifications of PIC24FJ64GA102-I/ML
Core Size
16-Bit
Program Memory Size
64KB (22K x 24)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
21
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC24
Ram Memory Size
8KB
Cpu Speed
32MHz
No. Of Timers
5
Interface
I2C, LIN, SPI, USART
No. Of Pwm Channels
5
Embedded Interface Type
I2C, LIN, SPI, USART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ64GA102-I/ML
Manufacturer:
MAXIM
Quantity:
15 620
- PIC24FJ32GA102-ISP PDF datasheet
- PIC24FJ32GA102-ISP PDF datasheet #2
- PIC24FJ32GA102-ISP PDF datasheet #3
- PIC24FJ64GA104-IML PDF datasheet #4
- Current page: 132 of 300
- Download datasheet (5Mb)
PIC24FJ64GA104 FAMILY
REGISTER 10-13: RPINR22: PERIPHERAL PIN SELECT INPUT REGISTER 22
REGISTER 10-14: RPINR23: PERIPHERAL PIN SELECT INPUT REGISTER 23
DS39951B-page 130
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-13
bit 12-8
bit 7-5
bit 4-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-5
bit 4-0
U-0
U-0
U-0
U-0
—
—
—
—
Unimplemented: Read as ‘0’
SCK2R<4:0>: Assign SPI2 Clock Input (SCK2IN) to Corresponding RPn or RPIn Pin bits
Unimplemented: Read as ‘0’
SDI2R<4:0>: Assign SPI2 Data Input (SDI2) to Corresponding RPn or RPIn Pin bits
Unimplemented: Read as ‘0’
SS2R<4:0>: Assign SPI2 Slave Select Input (SS2IN) to Corresponding RPn or RPIn Pin bits
U-0
U-0
U-0
U-0
—
—
—
—
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
U-0
U-0
U-0
U-0
—
—
—
—
SCK2R4
SDI2R4
SS2R4
R/W-1
R/W-1
R/W-1
U-0
—
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
SCK2R3
SDI2R3
SS2R3
R/W-1
R/W-1
R/W-1
U-0
—
SCK2R2
SDI2R2
SS2R2
R/W-1
R/W-1
R/W-1
U-0
—
© 2009 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
SCK2R1
SDI2R1
SS2R1
R/W-1
R/W-1
R/W-1
U-0
—
SCK2R0
SDI2R0
SS2R0
R/W-1
R/W-1
R/W-1
U-0
—
bit 8
bit 0
bit 8
bit 0
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